Technical reports, manuscripts and photographs document the early history of the University of Utah Computer Science Department.
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Synthesis, Verification and Optimization of Systolic Arrays | Systolic arrays are a class of parallel architectures consisting of regular interconnections of a very large number of simple processors, each one operating on a small part of the problem. They are typically designed to be used as back-end. special-purpose devices for computation-intensive processin... | computer architecture; systolic array; VLSI | 1986-12 |
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