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Creator | Title | Description | Subject | Date |
1 |
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Smith, Kent F. | A fast parallel squarer based on divide-and-conquer | Fast and small squarers are needed in many applications such as image compression. A new family of high performance parallel squarers based on the divide-and-conquer method is reported. Our main result was realizing the basis cases of the divide-and-conquer recursion by using optimized n-bit primiti... | Squarer; Parallel squarers; Divide-and-conquer; MOPS; CMOS | 1995 |
2 |
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Brunvand, Erik L. | A partial scan methodology for testing self-timed circuits | This paper presents a partial scan method for testing control sections of macromodule based self-timed circuits for stuck-at faults. In comparison with other proposed test methods for self-timed circuits, this technique offers better fault coverage than methods using self-checking techniques, and ... | | 1995 |
3 |
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Brunvand, Erik L. | A partial scan methodology for testing self-timed circuits | This paper presents a partial scan method for testing control sections of macromodule based self-timed circuits for stuck-at faults. In comparison with other proposed test methods for self-timed circuits, this technique offers better fault coverage than methods using self-checking techniques, and re... | Self-timed circuits; Testing | 1995 |
4 |
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Sobh, Tarek M. | A survey on sensor classifications for industrial applications | The importance of sensors in industrial applications is a result of the introduction of many robotics, automation, and intelligent control techniques into factory floors. Research and improvements need to be continuously performed to meet the challenges in automation and manufacturing applications i... | Sensor classifications; Industrial applications; Sensors | 1995 |
5 |
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Brunvand, Erik L. | Automatic rapid prototyping of semi-custom VLSI circuits using actel FPGAs | Abstract : We describe a technique for translating semi-custom VLSI circuits automatically into field programmable gate arrays (FPGAs) for rapid prototyping to develop a system. Using an array multiplier as an example of this translation, the VLSI circuits are designed using a cell-matrix based envi... | | 1995 |
6 |
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Carter, John B.; Davis, Al; Kuramkote, Ravindra; Stoller, Leigh B. | Avalanche: A communication and memory architecture for scalable parallel computing | As the gap between processor and memory speeds widens?? system designers will inevitably incorpo rate increasingly deep memory hierarchies to maintain the balance between processor and memory system performance At the same time?? most communication subsystems are permitted access only to main m... | Avalanche; Communication architecture; Memory architecture | 1995 |
7 |
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Carter, John B. | Avalanche: A communication and memory architecture for scalable parallel computing | As the gap between processor and memory speeds widens, system designers will inevitably incorporate increasingly deep memory hierarchies to maintain the balance between processor and memory system performance. At the same time, most communication subsystems are permitted access only to main memory ... | Avalanche; Computer memory; Memory architecture | 1995 |
8 |
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Hansen, Charles D. | Binary-swap and shear-warp volume renderer on the T3D | Large parallel machines give today's scientists the ability to compute very large simulations which may generate equally large data. Not only does having visualization tools on the parallel system allow the scientist to take advantage of the large memory to visualize the data, the processing power a... | Volume rendering; Binary-swap | 1995 |
9 |
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Hansen, Charles D. | Binary-swap volumetric rendering on the T3D | This paper presents a data distributed parallel raytraced volume rendering algorithm and its implementation on the CRI T3D. This algorithm distributes the data and the computational load to individual processing units to achieve fast and high-quality rendering of high-resolution data. The volume dat... | Volume rendering; Binary-swap; Ray tracing; Parallel rendering | 1995 |
10 |
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Lindstrom, Gary E. | Compositionally modular Scheme | We present a new module system for Scheme that supports a high degree of implementation reuse via module composition. The module system encourages breaking down a program into the smallest possible individually meaningful modules, and recomposing them using a powerful set of adaptation and combinat... | Module system | 1995 |
11 |
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Hansen, Charles D. | Cost-effective data-parallel load balancing | Load balancing algorithms improve a program's performance on unbalanced datasets, but can degrade performance on balanced datasets, because unnecessary load redistributions occur. This paper presents a cost-effective data-parallel load balancing algorithm which performs load redistributions only... | Load balancing | 1995 |
12 |
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Brunvand, Erik L. | DFT for fast testing of self-timed control circuits | In this paper, we present a methodology to perform fast testing of the control path of self-timed circuits [91]. The speedup is achieved by testing all the execution paths in the control simultaneously. The circuits considered in this paper are those designed using an OCCAM based circuit compile... | | 1995 |
13 |
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Stoller, Leigh B. | Direct deposit: a basic user-level protocol for carpet clusters? | This note describes the Direct Deposit Protocol (DDP), a simple protocol for multicomputing on a carpet cluster. This protocol is an example of a user-level protocol to be layered on top of the low-level, sender-based protocols for the Protocol Processing Engine. The protocol will be described in te... | Direct Deposit Protocol; DDP; Carpet clusters; Multicomputing; User-level protocol | 1995 |
14 |
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Henderson, Thomas C. | Evolutionary teleomorphology | The physical layout of organs and neural structures in biological systems is important to their functioning, and is the result of evolutionary selection forces. We believe this is true even at the individual neuron level, and should be accounted for in any bio-based approach. In particular, when tr... | Evolutionary teleomorphology; Bio-based approach; Physical layout problem; PLP; Neurons; Nodes | 1995 |
15 |
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Gopalakrishnan, Ganesh | Explicit-enumeration based verification made memory-efficient | We investigate techniques for reducing the memory requirements of a model checking tool employing explicit enumeration. Two techniques are studied in depth: (1) exploiting symmetries in the model, and (2) exploiting sequential regions in the model. The first technique resulted in a significant reduc... | Verification; Model checking tool; Memory-efficient | 1995 |
16 |
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Thompson, William B. | Exploiting discontinuities in optical flow | Most optical flow estimation techniques have substantial difficulties dealing with flow discontinuities. Methods which simultaneously detect flow boundaries and use the detected boundaries to aid in flow estimation can produce significantly improved results. Current approaches to implementing these ... | Optical flow; Discontinuities | 1995 |
17 |
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Thompson, William B. | Feature-based reverse engineering of mechanical parts | Reverse engineering of mechanical parts requires extraction of information about an instance of a particular part sufficient to replicate the part using appropriate manufacturing techniques. This is important in a wide variety of situations, since functioning CAD models are often unavailable or unus... | Mechanical parts | 1995 |
18 |
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Richardson, William F. | The Fred VHDL Model | This is the companion document to my dissertation. It contains 47 pages of schematics, and 163 pages of VHDL code. It is pretty meaningless without the dissertation, and it only exists because I felt that I should archive this information somewhere. | | 1995 |
19 |
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Richardson, William F. | Fred: an architecture for a self-timed decoupled computer | Decoupled computer architectures provide an effective means of exploiting instruction level parallelism. Self-timed micropipeline systems are inherently decoupled due to the elastic nature of the basic FIFO structure, and may be ideally suited for constructing decoupled computer architectures. Fred ... | Decoupled computer; Fred | 1995 |
20 |
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Weinstein, David | Hierarchical data structures for interactive volume visualization | In order to interactively investigate large-scale 3D data sets, we propose an improved hierarchical data structure for structured grids and an original hierarchical d a t a structure for unstructured grids. These multi-tiered implementations allow the user to interactively control both the local and... | Hierarchical data structures; Volume visualization; 3D data sets | 1995 |
21 |
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Lindstrom, Gary E. | Layered, server-based support for Object-Oriented application development | This paper advocates the idea that the physical modularity (file structure) of application components supported by conventional OS environments can be elevated to the level of logical modularity, which in turn can directly support application development in an object-oriented manner. We demonstrate ... | Object-Oriented application development | 1995 |
22 |
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Brunvand, Erik L. | Low latency self-timed flow-through FIFOs | Self-timed flow-through FIFOs are constructed easily using only a single C-element as control for each stage of the FIFO. Throughput can be very high in this type of FIFO as the communication required to send new data to the FIFO is local to only the first element of the FIFO. Circuit density can ... | | 1995 |
23 |
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Hansen, Charles D. | Massively parallel visualization: parallel rendering | This paper presents rendering algorithms, developed for massively parallel processors (MPPs), for polygonal, spheres, and volumetric data. The polygon algorithm uses a data parallel approach whereas the sphere and volume renderer use a MIMD approach. Implementations for these algorithms are presente... | Parallel visualization; Parallel rendering; Massively parallel processors | 1995 |
24 |
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Gopalakrishnan, Ganesh; Henderson, Thomas C. | Modeling and verification of distributed control scheme for mobile robots | In this report we present a sensor-based distributed control scheme for mobile robots. This scheme combines centralized and decentralized control strategies. Each group of sensors is considered to be a process that performs sensing and carries out local control tasks as well. Besides these processes... | Distributed control scheme; Sensor-based | 1995 |
25 |
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Lindstrom, Gary E. | Object-oriented programming in scheme with first-class modules and operator-based inheritance | We characterize object-oriented programming as structuring and manipulating a uniform space of first-class values representing modules, a distillation of the notion of classes. Operators over modules individually achieve effects such as encapsulation, sharing, and static binding. A variety of idioms... | First-class modules; Operator-based inheritance | 1995 |