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Creator | Title | Description | Subject | Date |
376 |
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Evans, David | Graphical man/machine communications: May 1971 | Final technical report 1 December 1969 to 30 June 1970. | | 1971-05 |
377 |
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Evans, David | Graphical man/machine communications: November 1966 | Semiannual progress report for period ending 30 November, 1966. | | 1966-11 |
378 |
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Evans, David | Graphical man/machine communications: November 1968 | Semi-Annual Technical Report 1 June - 30 November 1968 | | 1968 |
379 |
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Evans, David | Graphical man/machine communications: November 1969 | Semi-Annual Technical Report 1 June 1969 - 30 November 1969 | | 1969-11 |
380 |
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Hansen, Charles D. | Graphics applications for grid computing | The first article, "Enabling View-Dependent Progressive Volume Visualization on the Grid" by Alan Norton and Alyn Rockwood describes and evaluates the communication in a progressive, visibility-driven compression scheme for distributing volumetric data from grid resources to volume-rendering clien... | Grid computing | 2003-03 |
381 |
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Johnson, Christopher R. | Grid-enabling problem solving environments: a case study of SCIRun and NetSolve | Combining the functionality of NetSolve, a grid-based middleware solution, with SCIRun, a graphically-based problem solving environment (PSE), yields a platform for creating and executing grid-enabled applications. Using this integrated system, hardware and/or software resources not previously ac... | Grid computing; SCIRun; NetSolve; Problem solving environment; Numerical libraries; Parallel programming (Computer science) | 2001 |
382 |
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Zhang, Chengqiang | Hardware-only stream prediction + cache prefetching + dynamic access ordering | The speed gap between processors and memory system is becoming the performance bottleneck for many applications, and computations with strided access patterns are among those that suffer most. The vectors used in such applications lack temporal and often spatial locality, and are usually too large t... | Speed gap; Stream prediction; Cache prefetching; Dynamic access ordering | 1999 |
383 |
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Brunvand, Erik L. | HDL modeling for analysis and optimization of asynchronous controllers | We propose a simulation-based technique for analysis and optimization of extended burst-mode (XBM) asynchronous controllers. In asynchronous controllers of this sort, timing information on control signals is significant both for performance enhancement and timing validation. Timing information, ... | | 2005 |
384 |
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Regehr, John | Help, help, Im being suppressed the significance of suppressors in software testing | Abstract-Test features are basic compositional units used to describe what a test does (and does not) involve. For example, in API-based testing, the most obvious features are function calls; in grammar-based testing, the obvious features are the elements of the grammar. The relationship between fea... | | 2013-01-01 |
385 |
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Cohen, Elaine | Hidden curve removal for free form surfaces | This paper describes a hidden curve algorithm specifically designed for sculptured surfaces. A technique is described to extract the visible curves for a given scene without the need to approximate the surface by polygons. This algorithm produces higher quality results than polygon based algorithms,... | Hidden curves; Free form surfaces; Sculptured surfaces | 1989 |
386 |
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Archuleta, Michael | Hidden surface line drawing algorithm | This paper describes a fast procedure in processing hidden surface pictures with the output in vector form. The program has been written expressly for a Decsystem 10 and has performed successfully on three different installations. The algorithm which is being used is a modification to the Watkins' A... | Watkins algorithm; Hidden surface | 1972 |
387 |
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Gopalakrishnan, Ganesh | Hierarchical action refinement: a methodology for compiling asynchronous circuits from a concurrent HDL | A hardware specification formalism called hopCP is introduced, hopCP provides an uniform notation t o describe the causal relationships between a set of nonatomic actions which capture the computational, concurrency, control and communication aspects of hardware behavior. A systematic approach to sy... | Hierarchical action refinement; Hardware specification formalism; hopCP | 1991 |
388 |
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Weinstein, David | Hierarchical data structures for interactive volume visualization | In order to interactively investigate large-scale 3D data sets, we propose an improved hierarchical data structure for structured grids and an original hierarchical d a t a structure for unstructured grids. These multi-tiered implementations allow the user to interactively control both the local and... | Hierarchical data structures; Volume visualization; 3D data sets | 1995 |
389 |
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Regehr, John | Hierarchical schedulers, performance guarantees, and resource management | An attractive approach to scheduling applications with diverse CPU scheduling requirements is to use different schedulers for different applications. For example: real-time schedulers allow applications to perform computations before deadlines, time-sharing schedulers provide high throughput for com... | | 1999-01-01 |
390 |
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Gopalakrishnan, Ganesh | High level optimizations in compiling process descriptions to asynchronous circuits | Asynchronous/'Self-Timed designs are beginning to attract attention as promising means of dealing with the complexity of modern VLSI technology. In this paper, we present our views on why asynchronous systems matter. We then present details of our high level synthesis tool SHILPA that can automatic... | Self-timed; VLSI | 1992 |
391 |
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Frost, Richard L. | High resolution astronomical imaging through the turbulent atmosphere | This research is principally concerned with the digital reconstruction of star images observed with large ground-based telescopes, although the techniques developed here will have application to a broad class of reconstruction problems. Since the work of Labeyrie, the difficulty in producing accurat... | Astronomical imaging; Turbulent atmosphere; Digital reconstruction; Star images | 1979 |
392 |
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Brunvand, Erik L. ; Gopalakrishnan, Ganesh | High-level asynchronous system design using the ACK framework | Designing asynchronous circuits is becoming easier as a number of design styles are making the transition from research projects to real, usable tools. However, designing asynchronous "systems" is still a difficult problem. We define asynchronous systems to be medium to large digital systems whose... | | 2000 |
393 |
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Henderson, Thomas C. | High-level planning for dextrous manipulation | The development of mechanical end effectors capable of dextrous manipulation is a rapidly growing and quite successful field of research. It has in some sense put the focus on control issues, in particular, how to control these remarkably anthropomorphic manipulators to perform the deft movement tha... | Mechanical end effectors; Dextrous manipulation | 1987 |
394 |
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Kasera, Sneha K.; Patwari, Neal | High-rate uncorrelated bit extraction for shared secret key generation from channel measurements | Secret keys can be generated and shared between two wireless nodes by measuring and encoding radio channel characteristics without ever revealing the secret key to an eavesdropper at a third location. This paper addresses bit extraction, i.e., the extraction of secret key bits from noisy radio chan... | Wireless networks; Multipath fading; Physical layer; Key generation; Secret keys; Bit extraction | 2010-01 |
395 |
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Awate, Suyash P.; Whitaker, Ross T. | Higher-order image statistics for unsupervised, information-theoretic, adaptive, image filtering | The restoration of images is an important and widely studied problem in computer vision and image processing. Various image filtering strategies have been effective, but invariably make strong assumptions about the properties of the signal and/or degradation. Therefore, these methods typically la... | Image filtering; Image restoration | 2005-04-15 |
396 |
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Tasdizen, Tolga; Whitaker, Ross T. | Higher-order nonlinear priors for surface reconstruction | For surface reconstruction problems with noisy and incomplete range data, a Bayesian estimation approach can improve the overall quality of the surfaces. The Bayesian approach to surface estimation relies on a likelihood term, which ties the surface estimate to the input data, and the prior, whic... | Surface reconstruction; Bayesian approach; Nonlinear prior | 2002-12-09 |
397 |
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Regehr, John | HLS: a framework for composing soft real-time schedulers | Hierarchical CPU scheduling has emerged as a way to (1) support applications with diverse scheduling requirements in open systems, and (2) provide load isolation between applications, users, and other resource principals. Most existing work on hierarchical scheduling has focused on systems that prov... | | 2001-01-01 |
398 |
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Gopalakrishnan, Ganesh | HOP: A formal model for synchronous circuits using communicating fundamental mode symbolic automata | We study synchronous digital circuits in an abstract setting. A circuit is viewed as a collection of modules connected through their boundary ports, where each port assumes a fixed direction (input or output) over one cycle of operation, and can change directions across cycles. No distinction is ma... | HOP | 1992 |
399 |
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Gopalakrishnan, Ganesh | HOP: a process model for synchronous hardware semantics, and experiments in process composition | We present a language "Hardware viewed as Objects and Processes" (HOP) for specifying the structure, behavior, and timing of hardware systems. HOP embodies a simple process model for lock-step synchronous processes. An absproc specification written in HOP describes the externally observable behavior... | HOP; Synchronous hardware semantics | 1988 |
400 |
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Gopalakrishnan, Ganesh | HOP: a process model for synchronous hardware systems | Modules in HOP are black-boxes that are understood and used only in terms of their interface. The interface consists of d a t a ports, events, and a protocol specification that uses events and asserts/queries values to / from ports. Events are realized as different combinations of control wires or... | HOP; Process models; Synchronous hardware systems | 1988 |