Technical reports, manuscripts and photographs document the early history of the University of Utah Computer Science Department.
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High-speed conterflow-clocked pipelining illustrated on the design of subband vector quantizatizer chips | This dissertation introduces Counterflow-Clocked (C2) pipelining and discusses its usefulness and limitations to build large, high speed VLSI chips. It also presents the design of an image compression chip set to implement subband vector quantization that can handle HDTV data rates with reasonable V... | VLSI chips; counterflow-clocked pipelining; computers | 1995-12 |
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