Title | Date | Type | Setname | ||
---|---|---|---|---|---|
1 |
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A DRAM backend for the impulse memory system | 1998-12-16 | Text | ir_uspace |
2 |
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Design a DRAM backend for the impulse memory system | 2000 | Text | ir_uspace |
3 |
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Designing efficient memory schedulers for future systems | 2013-12 | Text | ir_etd |
4 |
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Enabling big memory with emerging technologies | 2016 | Text | ir_etd |
5 |
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Managing data locality in future memory hierarchies using a hardware software codesign approach | 2014-12 | Text | ir_etd |