Asylim: A simulation and placement checking system for path-programmable logic integrated circuits

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Publication Type technical report
School or College College of Engineering
Department Computing, School of
Creator Nelson, Brent Edwin
Title Asylim: A simulation and placement checking system for path-programmable logic integrated circuits
Date 1983-06
Description Presented in this thesis is a simulation/design checking system for PPL circuits. This system directly addresses the problems associated with the other simulators listed above. The circuit model employed by the system makes use of six logic values and a close correspondence between the PPL and simulation primitives. This results in a very adaptable model that cam handle both NMOS and CMOS circuits equally well.
Type Text
Publisher University of Utah
Subject PPL circuits; PPL; computers; NMOS circuits; CMOS circuits; ASYLIM; simulation checking system; design checking system
Subject LCSH ASYLIM (Computer program language); Computers--Circuits; Computer simulation--Research
Language eng
Bibliographic Citation Nelson, B. E. (1983). Asylim: A simulation and placement checking system for path-programmable logic integrated circuits.
Series University of Utah Computer Science Technical Report
Relation is Part of ARPANET
Format Medium application/pdf
Format Extent 183,028 Bytes
File Name Nelson-A_Simulation_And_Placement.pdf
Conversion Specifications Original scanned with Kirtas 2400 and saved as 400 ppi uncompressed TIFF. PDF generated by Adobe Acrobat Pro X for CONTENTdm display
ARK ark:/87278/s6vh7nx2
Setname ir_computersa
Date Created 2015-11-02
Date Modified 2015-11-03
ID 95083
Reference URL https://collections.lib.utah.edu/ark:/87278/s6vh7nx2
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