Relative timing

Update Item Information
Publication Type Journal Article
School or College College of Engineering
Department Electrical & Computer Engineering
Creator Stevens, Kenneth
Other Author Ginosar, Ran; Rotem, Shai
Title Relative timing
Date 1999
Description Relative Timing is introduced as an informal method for aggressive asynchronous design. It is demonstrated on three example circuits (C-Element, FIFO, and RAPPID Tag Unit), facilitating transformations from speed-independent circuits to burst-mode, relative timed, and pulse-mode circuits. Relative timing enables improved performance, area, power and testability in all three cases.
Type Text
Publisher Institute for the Study of Women
First Page 208
Last Page 218
Language eng
Bibliographic Citation Stevens, K. S., Ginosar, R., & Rotem, S. (1999). Relative timing. Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC-99), 208-18. April.
Rights Management (c) Institute for the Study of Women
Format Medium application/pdf
Format Extent 203,670 bytes
Identifier ir-main,15303
ARK ark:/87278/s6ht36wq
Setname ir_uspace
ID 706301
Reference URL https://collections.lib.utah.edu/ark:/87278/s6ht36wq
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