Analog MAP decoder for (8, 4) hamming code in subthreshold CMOS

Update item information
Publication Type Journal Article
School or College College of Engineering
Department Electrical & Computer Engineering
Creator Myers, Chris J.; Schlegel, Christian
Other Author Winstead, Chris; Dai, Jie; Kim, Woo Jin.; Little, Scott; Kim, Yong-Bin
Title Analog MAP decoder for (8, 4) hamming code in subthreshold CMOS
Date 2001
Description An all-MOS analog implementation of a MAP decoder is presented for the (8, 4) extended Hamming code. This paper describes the design and analysis of a tail-biting trellis decoder implementation using subthreshold CMOS devices. A VLSI test chip has recently returned from fabrication, and preliminary test results indicate accurate decoding up to 20 MBit/s.
Type Text
Publisher Institute of Electrical and Electronics Engineers (IEEE)
First Page 132
Last Page 147
Language eng
Bibliographic Citation Winstead, C., Dai, J., Kim, W. J., Little, S., Kim, Y.-B., Myers, C., & Schlegel, C. (2001). Analog MAP decoder for (8, 4) hamming code in subthreshold CMOS. Advanced Research in VLSI Conference, 132-47. March.
Rights Management (c) 2001 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Format Medium application/pdf
Format Extent 802,280 bytes
Identifier ir-main,15033
ARK ark:/87278/s6qz2vb8
Setname ir_uspace
Date Created 2012-06-13
Date Modified 2021-05-06
ID 704840
Reference URL https://collections.lib.utah.edu/ark:/87278/s6qz2vb8
Back to Search Results