The path programmable logic (PPL) user's manual

This manual describes the primitive NMOS path programmable logic cells currently in use at the University of Utah. It contains detailed descriptions, schematics and composite layout of all cells. Also included are PPL programming rules as well as layout design rules for each cell set.

82-07 0_ The Path Programmable Logic (PPL) User's Manual by The University of Utah VLSI Research Group Department of Computer Science University of Utah Salt Lake City, Utah 84112 Preliminary version: 27 July 1982 Revision date: 27 July 1982 ABSTRACT This manual describes the primitive NMOS Path Programmable Logic cells currently in use at the University of Utah. It contains detailed descriptions, schematics and composite layouts of all cells. Also included are PPL programming rules as well as the layout design rules for each cell set. Copyright (C) 1982 Kent F. Smith, Tony M. Carter, Douglas A. Fisher, Brent E. Nelson, and Alan B. Hayes This work supported in part by DARPA under grant number MDA 903-81-C-0411 ,General Instrument Corp. under contract number 5-20326, and by Sistemas y Componentes under contract number 5-20378.PPL Manual 27 July 1982 i i List of Figures Figure 3-1s S CELL GRAPHICS, SCHEMATIC AND COMPOSITE 16 Figure 3-2: S2 CELL GRAPHICS, SCHEMATIC AND COMPOSITE 17 Figure 3-3: R CELL GRAPHICS, SCHEMATIC AND COMPOSITE 18 Figure 3-4: R2 CELL GRAPHICS, SCHEMATIC AND COMPOSITE . 19 Figure 3-5: PLUS CELL GRAPHICS, SCHEMATIC AND COMPOSITE • 20 Figure 3-6: 1 CELL GRAPHICS, SCHEMATIC AND COMPOSITE 21 Figure 3-7: 0 CELL GRAPHICS, SCHEMATIC AND COMPOSITE 22 Figure 3-8: BLK CELL GRAPHICS, SCHEMATIC AND COMPOSITE 23 Figure 3-9: OCL CELL GRAPHICS, SCHEMATIC AND COMPOSITE 24 Figure 3-10: OCR CELL GRAPHICS, SCHEMATIC AND COMPOSITE 25 Figure 3-11: OCB CELL GRAPHICS, SCHEMATIC AND COMPOSITE 26 Figure 3-12: INV01 CELL GRAPHICS, SCHEMATIC AND COMPOSITE 27 Figure 3-13: INV10 CELL GRAPHICS, SCHEMATIC AND COMPOSITE • 28 Figure 4-1: SICUINV CELL GRAPHICS , SCHEMATIC AND COMPOSITE 30 Figure 4-2: CPT CELL GRAPHICS , SCHEMATIC AND COMPOSITE 31 Figure 4-3: CPTL CELL GRAPHICS , SCHEMATIC AND COMPOSITE 32 Figure 4-4: CPTR CELL GRAPHICS , SCHEMATIC AND COMPOSITE 33 Figure 4-5: RPT1 CELL GRAPHICS , SCHEMATIC AND COMPOSITE 34 Figure 4-6: RPT2 CELL GRAPHICS , SCHEMATIC AND COMPOSITE 35 Figure 4-7: RPTR CELL GRAPHICS , SCHEMATIC AND COMPOSITE 36 Figure 4-8: RPTL CELL GRAPHICS , SCHEMATIC AND COMPOSITE 37 Figure 4-9: LATCH2 CELL GRAPHICS , SCHEMATIC AND COMPOSITE 38 Figure 4-10: LATCH CELL GRAPHICS 40 Figure 4-11: LATCH CELL SCHEMATIC 40 Figure 4-12: LATCH CELL COMPOSITE 41 Figure 4-13: FF CELL GRAPHICS . 43 Figure 4-14: FF CELL SCHEMATIC 44 Figure 4-15: FF CELL COMPOSITE 45 Figure 4-16: FFC CELL GRAPHICS 47 Figure 4-17: FFC CELL SCHEMATIC 48 Figure 4-18: FFC CELL COMPOSITE 49 Figure 4-19: FFR CELL GRAPHICS 51 Figure 4-20: FFR CELL SCHEMATIC . 52 Figure 4-21: FFR CELL COMPOSITE 53 Figure 4-22: FFW CELL GRAPHICS 55 Figure 4-23: FFW CELL SCHEMATIC 56 Figure 4-24: FFW CELL COMPOSITE 57 Figure 4-25: FFRW CELL GRAPHICS . 59 Figure 4-26: FFRW CELL SCHEMATIC 60 Figure 4-27: FFRW CELL COMPOSITE 61 Figure 5-1: CCR CELL GRAPHICS AND SCHEMATIC 62 Figure 5-2: CCL CELL GRAPHICS AND SCHEMATIC 63 Figure 5-3: CCN CELL GRAPHICS AND SCHEMATIC 64 Figure 5-4: RCN CELL GRAPHICS AND SCHEMATIC 65 Figure 5-5: RCBK CELL GRAPHICS 66 Figure 5-6: LCBK CELL GRAPHICS . 67 Figure 5-7: CBRK CELL GRAPHICS 68 Figure 5-8: RBRK CELL GRAPHICS 69 Figure 5-9: PH1LCN CELL GRAPHICS , SCHEMATIC AND COMPOSITE 70 Figure 5-10: PH1RCN CELL GRAPHICS , SCHEMATIC AND COMPOSITE 71 Figure 5-11: PH2LCN CELL GRAPHICS , SCHEMATIC AND COMPOSITE 72PPL Manual 27 July 1982 i l l Figure 5-12: PH2RCN CELL GRAPHICS , SCHEMATIC AND COMPOSITE 73 Figure 6-1: RPU CELL GRAPHICS , SCHEMATIC AND COMPOSITE 74 Figure 6-2: CP1L CELL GRAPHICS , SCHEMATIC AND COMPOSITE 75 Figure 6-3: CP1R CELL GRAPHICS , SCHEMATIC AND COMPOSITE 76 Figure 6-4: CP2L CELL GRAPHICS , SCHEMATIC AND COMPOSITE 77 Figure 6-5: CP2R CELL GRAPHICS , SCHEMATIC AND COMPOSITE 78 Figure 6-6: CP3L CELL GRAPHICS , SCHEMATIC AND COMPOSITE ■ 79 Figure 6-7: CP3R CELL GRAPHICS , SCHEMATIC AND COMPOSITE ' 80 Figure 7-1: VBUS CELL GRAPHICS , SCHEMATIC AND COMPOSITE 82 Figure 7-2: GBUS CELL GRAPHICS , SCHEMATIC AND COMPOSITE 83 Figure 7-3: CKCN CELL GRAPHICS , SCHEMATIC AND COMPOSITE 84 Figure 7-4: VJR CELL GRAPHICS , SCHEMATIC AND COMPOSITE 85 Figure 7-5: VJL CELL GRAPHICS , SCHEMATIC AND COMPOSITE 86 Figure 7-6: GJR CELL GRAPHICS , SCHEMATIC AND COMPOSITE 87 Figure 7-7: GJL CELL GRAPHICS , SCHEMATIC AND COMPOSITE 88 Figure 7-8: LCAP CELL GRAPHICS , SCHEMATIC AND COMPOSITE 89 Figure 7-9: RCAP CELL GRAPHICS , SCHEMATIC AND COMPOSITE 90 Figure 8-1: BLKPAD CELL GRAPHICS 93 Figure 8-2: BLKPAD CELL SCHEMATIC 91* Figure 8-3: BLKPAD CELL COMPOSITE 95 Figure 8-4: IPROPAD CELL GRAPHICS 97 Figure 8-5: IPROPAD CELL SCHEMATIC 98 Figure 8-6: IPROPAD CELL COMPOSITE 99 Figure 8-7: IBUFPAD CELL GRAPHICS 101 Figure 8-8: IBUFPAD CELL SCHEMATIC 102 Figure 8-9: IBUFPAD CELL COMPOSITE 103 Figure 8-10: CIBUFPAD CELL GRAPHICS 105 Figure 8-11: CIBUFPAD CELL SCHEMATIC 106 Figure 8-12: CIBUFPAD CELL COMPOSITE 107 Figure 8-13: OBUFPAD CELL GRAPHICS 109 Figure 8-14: OBUFPAD CELL SCHEMATIC 110 Figure 8-15: OBUFPAD CELL COMPOSITE 111 Figure 8-16: COBUFPAD CELL GRAPHICS 113 Figure 8-17: COBUFPAD CELL SCHEMATIC 114 Figure 8-18: COBUFPAD CELL COMPOSITE 115 Figure 8-19: OCBUFPAD CELL GRAPHICS 117 Figure 8-20: OCBUFPAD CELL SCHEMATIC 118 Figure 8-21: OCBUFPAD CELL COMPOSITE 119 Figure 8-22: VDDPAD CELL GRAPHICS 121 Figure 8-23: VDDPAD CELL SCHEMATIC 122 Figure 8-24: VDDPAD CELL COMPOSITE 123 Figure 8-25: GNDPAD CELL GRAPHICS 125 Figure 8-26: GNDPAD CELL SCHEMATIC 126 Figure 8-27: GNDPAD CELL COMPOSITE 127 Figure 8-28: FILLPAD CELL GRAPHICS . 129 Figure 8-29: FILLPAD CELL SCHEMATIC 130 Figure 8-30: FILLPAD CELL COMPOSITE 131 Figure 8-31: CORNERPAD CELL GRAPHICS 133 Figure 8-32: CORNERPAD CELL SCHEMATIC 131* Figure 8-33: CORNERPAD CELL COMPOSITE 135 Figure 9-1: Sample PPL Design 138PPL Manual 27 July 1982 1 GENERAL PATH-PROGRAMMABLE LOGIC THEORY 1. GENERAL PATH-PROGRAMMABLE LOGIC THEORY Path-Programmable Logic (PPL) is a descendant of the Storage/Logic Array (SLA). The basic theory of Path-Programmable Logic is very similar and is treated in great detail in Snith's PhD thesis. The theory of the PPL cell set is very similar to the theory of standard PLA circuits. In the PPL, however, the AND and OR planes are superimposed one on top of the other. By doing this the space required to implement a circuit can be reduced by about a factor of two compared with the standard PLA implementation. The purpose of this cell set is to allow a designer to design a circuit at a logical level instead of at the transistor level. By using this level of design the time required to design an IC can be reduced greatly while the size of the circuit is increased only slightly. For the purposes of this manual, only the operation of the NMOS PPL will be described. * - AND PLANE -The AND plane is composed of rows which become 'true' when they sense the AND condition of a combination of signals on a set of columns, thereby allowing the row to go high. The function of the cells making up the AND plane will be described later. - OR PLANE -The OR plane is composed of columns which contain two wires (left and right). When a wire is pulled low then the wire is 'true'. For normal usage the left wire in the column is used as the 'O' wire and the right wire is used as the "1" wire. An OR condition is formed on a column wire when a true row pulls the column wire low. Normally the '1' wire is pulled low. A '01' inverter can then be used on the column to generate the complement of the OR condition. In this way, either the OR condition or its complement can be detected by a row. Without an explicit connection being made between the 2 column wires through the use of an inverter, pass transistor, or ohmic contact the column wires are independent of one another. • The cells are divided into six major categories: 1. PRIMITIVE ROW CELLS - These include the cells that occupy a single ' row cell, the smallest increment of space available in the PPL array. These include the simple combinational elements and ohmic contacts. 2. COMPLEX ROW CELLS - This category is made up from the storage elements (latches and flip flops) and the pass transistors. These cells all take up more than one row cell location. 3. PULL-UP CELLS - These include three sizes of column pull-ups and one row pull-up. They are used as loads on the row and column wires.PPL Manual 27 July 1982 GENERAL PATH-PROGRAMMABLE LOGIC THEORY 4. INTERCONNECT CELLS - In this cell set, the row and column interconnects are placed BETWEEN the cells. In addition to these interconnect cells this also includes the row and column break cells that are used for graphical purposes in the circuit design on the CV machine. 5* BOSSING CELLS - These are cells that must be placed around the perimeter of the active PPL area to distribute power, ground and the clocks to the PPL array. 6. PAD CELLS - Which include input-protection, output-protection, Vdd, GND, input, and output pads. All of the pad cells contain a portion of the scribe lane which goes around the perimeter of the chip.PPL Manual 27 July 1982 QUICK REFERENCES 3 2. QUICK REFERENCES This chapter is designed to be used as a quick reference for general PPL design. It contains no detailed information about the cells. For more information about each cell see the individual chapters. The cells which have internal pull-ups have an asterisk (*) inside the graphics. Cell : 0 / # Row(s) : 1 n -H--- Column(s) : 1 Cell : 1 / # Row(s) : 1 - 1 id Column(s) : 1 ★ Cell : S / # Row(s) : 1 Column(s) : 1 Cell : S2 / # Row(s) : 1 Column(s) : 1 TT Cell Row(s) Column(s) : R2 / # : 1 : 1 ■ - " i Cell : R / * Row(s) : 1 R Column(s) : 1 fH- X-PPL Manual 27 July 1982 QUICK REFERENCES Cell : PLUS / # Row(s) : 1 , ~1 3T" + J71- Column(s) : 1 Cell : BLK / # Row(s) : 1 Column(s) : 1 Cell : OCL / « Row(s) : 1 * Column(s) : 1 Cell : OCR / # Row(s) : 1 Column(s) : 1 Cell : OCB / # Row(s) : 1 ColumnCs) : 1 Row(s) : 1 Column(s) : 1 Cell : INV01 / # INV 0 1 [ 7 I- PPL Manual 27 July 1982 QUICK REFERENCES Row(s) : 1 Column(s) : 1 Cell : INV10 / # INV 1 0 M Cell : SICUINV / # Row(s) : 3 ... Column(s) : 1 Placement - Row: Even * SICU INV i + 'II' Cell : CPT / # Row(s) : 2 Column(s) : 1 """ Placement - Row: Even r i CPT Cell : CPTL / # Row(s) : 2 Column(s) : 1 i < Placement - Row: Odd r i CPTL □H Cell : CPTR / # Row(s) : 2 Column(s) : 1 Placement - Row: Odd r i CPTR HC Cell : RPT1 / # Row(s) : 2 Column(s) : 1 Placement - Row: Even r i DRPT L J H [ Row(s) ; 2 Column(s) : 1 Placement - Row: Even PPL Manual Cell : RPT2 / # 27 July 1982 QUICK REFERENCES r i RPTD L J Cell : RPTL / # Row(s) : 2 Column(s) : 1 Placement - Row: Even r i RPTL Cell : RPTR / # Row(s) : 2 ' 1 U- Column(s) : 1 RPTR X-ii Placement - Row: Even Cell Row(s) Column(s) Placement LATCH2 / # 3 1 Row: Even .1 Latch 2 ' * ■ ur f Cell Row(s) Column(s) Placement LATCH / # 3 2 Row: Even ii ii I R Si LATCH K I K SI Column: OddPPL Manual 27 July 1982 QUICK REFERENCES Cell Row(s) Column(s) Placement 4 2 Row: Even Column: Odd FF / # r I I II, I « S I 1 FF Cell : FFC / # Row(s) : 5 M Column(s) : 2 Placement - Row: Odd - Column: Odd " ji ii ft SI ] FF ■ WITH • ' CLEAR * It S ] 11 II Cell : FFR / # it t i i i ii It Si Row(s) : 6 1 READ Column(s) : 2 ENABLE FF Placement - Row: Even t Column: Odd . t It 5 1 II 11 Cell : FFW / # Row(s) : 5 Column(s) : 2 Placement - Row: Even Column: Odd II II It S 1 , WRITE ENABLE FF , i * si II IIPPL Manual 27 July 1982 QUICK REFERENCES Cell : FFRW / # Row(s) : 7 Column(s) : 2 Placement - Row: Odd Column: Odd .ii ii. IK 5 I 1 READ/ WRITE EM ABLE . ft I I Cell : VBUS / t Row(s) Column(s) Placement : 1 : 1 - Row: Even VDD Cell Row(s) Column(s) : GBUS : 2 : 1 / t GND 2 Placement - Row: Odd mj j Cell Row(s) Column(s) Placement VJR / * 1 1 Row: EvenPPL Manual 27 July 1982 QUICK REFERENCES Cell Row(s) Column(s) Placement VJL / # 1 1 Row: Even □ Cell : GJR / # Row(s) : 2 Column(s) : 1 Placement - Row: Odd Cell Row(s) Column(s) Placement GJL / # 2 1 Row: Odd Cell : LCAP / # Row(s) : 1 Column(s) : 1 Placement - Column: Even □_ - w < - u E i Cell Row(s) Column(s) Placement RCAP / # 1 1 Column: Odd Cell Row(s) Column(s) Placement CKCN / # 2 1 Row: OddPPL Manual 27 July 1982 QUICK REFERENCES Cell : PH1LCN / # Row(s) : 1 Column(s) : 1 PHI 1 a Placement - Column: Even Cell : PH1RCN / # Row(s) : Column(s) : 1 1 PHIt a Placement - Column: Odd Cell : PH2LCN / # Row(s) : 1 Column(s) : 1 PHI 2 □ 1 Placement - Column: Even Cell : PH2RCN / # Row(s) : Column(s) : 1 1 I PHI2 a Placement - Column: Odd - Cell : CBRK / Row(s) : 1 1 1 1 1 Column(s) : 1 Cell : RCBK / # Row(s) : 1 Column(s) : 1PPL Manual 27 July 1982 QUICK REFERENCES Cell LCBK / # Row(s) : 1 '' Column(s) : 1 • . 1 1 Cell : RBRK / # Row(s) : 1 Column(s) : 1 r ; Cell CCN / # Row(s) : 1 Column(s) : 1 • D D || '• 25 j r - Cell : CCL / t Row(s) : 1 Column(s) : 1 o 1 Cell : CCR / # Row(s) : 1 Column(s) : 1 n | Cell RCN / * Row(s) : 1 Column(s) : 1 ■ -PPL Manual 27 July 1982 QUICK REFERENCES Cell : BLKPAD / # SIZE : 2 PAD ONLY Cell : IBUFPAD / # SIZE : 2 INPUT BUFFER Cell : CIBUFPAD / # SIZE : 2 -J* Cell : IPROPAD / SIZE : 2PPL Manual 27 July 1982 QUICK REFERENCES Cell : OBUFPAD / # SIZE : 3 • OUTPUT BUFFER v Cell : COBUFPAD / # SIZE : 3 OUTPUT BUFFER Cell : OCBUFPAD / # SIZE : 3 LPPL Manual 27 July 1982 14 QUICK REFERENCES Cell : GNDPAD / # SIZE : 3 1---- GND BUSS (INNER BUSS) Cell : VDDPAD / # SIZE : 2 L VDD BUSS (OUTER BUSS) Cell : CORNERPAD / # Cell : FILLPAD / # SIZE : 1 F I LPPL Manual 27 July 1982 PRIMITIVE CELLS 15 3- PRIMITIVE CELLS The primitive cells consist of the following: - Row detection cells: S,S2,R,R2,PL0S(+). - Column detection cells: 1,0. - OHMic contact cells: 0CL(»),0CR(#),0CB(§). - Inverter cells: INV01,INV10. Some of the primitive cells are actually the same cell, as far as the schematic and composite are concerned, but since they perform- different logical functions they are given different names.PPL Manual 27 July 1982 PRIMITIVE CELLS Cell Name - S Function - set a flip-flop or latch Placement Restrictions - Column Odd Under or Over: FF,FFR,FFW,FFRW,LATCH,FFC CIF Number - Size Column : 1 Row : 1 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - Transistor size - .5 X .25 mill, or 12 X 6 micron. s Figure 3-1: S CELL GRAPHICS, SCHEMATIC AND COMPOSITE Cell Name - S2 Function - set a two wire latch. Placement Restrictions - Under or Over : LATCH2 Size Column : 1 Row : 1 CIF Number - Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - Transistor size - .5 X .25 mill, or 12 X 6 micron. PPL Manual 27 July 1982 PRIMITIVE CELLS Figure 3-2: S2 CELL GRAPHICS, SCHEMATIC AND COMPOSITE PPL Manual 27 July 1982 PRIMITIVE CELLS Cell Name - R Function - Reset a flip flop or latch Placement Restrictions - Column Even Under or Over: FF, FFR,FFW,FFRW,LATCH,FFC Size Column : 1 Row : 1 CIF Number - Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - Transistor size - .5 X .25 mill, or 12 X 6 micron. R Figure 3-3: R CELL GRAPHICS, SCHEMATIC AND COMPOSITE PRIMITIVE CELLS Cell Name - R2 Function - Reset a two wire latch Placement Restrictions - Under or Over : LATCH2 CIF Number - Size Column : 1 Row : 1 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - Transistor size - .5 X .25 mill, or 12 X 6 micron. PPL Manual 27 July 1982 Figure 3-4: R2 CELL GRAPHICS, SCHEMATIC AND COMPOSITE PPL Manual 27 July 1982 PRIMITIVE CELLS Cell Name - PLUS Function - Transfer row signal to right column wire. Placement Restrictions - Under or Over : No flip-flop or latch CIF Number - Size Column : 1 Row : 1 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - - Transistor size - .5 X .25 mill, or 12 X 6 micron. PLL Figure 3-5: PLUS CELL GRAPHICS, SCHEMATIC AND COMPOSITE PRIMITIVE CELLS Cell Name - 1 Function - Sense a true on the right column wire. Placement Restrictions - None CIF Number - Size Column : 1 Row : 1 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - - Transistor size - .5 X .25 mill, or 12 X 6 micron. PPL Manual 27 July 1982 Figure 3-6: 1 CELL GRAPHICS, SCHEMATIC AND COMPOSITE PRIMITIVE CELLS Cell Name - 0 Function - Sense a true on the left column wire. Placement Restrictions - None CIF Number - Size Column : 1 Row : 1 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - Transistor size - .5 X .25 mill, or 12 X 6 micron. PPL Manual 27 July 1982 ‘p !► X .25 0 FTPS l_) ,< Zl £ Figure 3-7: 0 CELL GRAPHICS, SCHEMATIC AND COMPOSITE PPL Manual 27 July 1982 PRIMITIVE CELLS Cell Name - BLK Function - Pass row and column wires. Placement Restrictions - Where ever there is no other active cell. Size Row : 1 Column : 1 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - BLK 0ZZ£ZZ3Z]i ' i ! i i ' Lj l. Figure 3-8: BLK CELL GRAPHICS, SCHEMATIC AND COMPOSITEPPL Manual 27 July 1982 PRIMITIVE CELLS Cell Name - OCL Function - Connect row to left column wire. Placement Restrictions - None CIF Number - Size Column : 1 Row : 1 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - - DCL Figure 3-9: X L CELL GRAPHICS, SCHEMATIC AND COMPOSITE PPL Manual 27 July 1982 PRIMITIVE CELLS Cell Name - OCR Function - Connect row to right column wire. Placement Restrictions - None CIF Number - Row : 1 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - Size Column : 1 OCR Figure 3-10: OCR CELL GRAPHICS, SCHEMATIC AND COMPOSITE PPL Manual 27 July 1982 PRIMITIVE CELLS Cell Name - OCB Function - Connect row to both column wires. Placement Restrictions - None CIF Number - Size Column : 1 Row : 1 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - iEZZ OCB lJ [ Figure 3-11: OCB CELL GRAPHICS, SCHEMATIC AND COMPOSITE Cell Name - INV01 Function - Pull the left column wire low when the right wire is high. Placement Restrictions - None CIF Number - Size Column : 1 Row : 1 Row capacitance - Row wire is not passed through this cell. Left Col Capacitance - - Right Col Capacitance - Row Resistance - Row wire is not passed through this cell. Transistor size - .5 X .25 mill, or 12 X 6 micron. PPL Manual 27 July 1982 PRIMITIVE CELLS INV 0 1 .5 X .25 h i rJ INV01 v r ZZa lJ L H I I --- Figure 3-12: INV01 CELL GRAPHICS, SCHEMATIC AND COMPOSITE PPL Manual 27 July 1982 PRIMITIVE CELLS Cell Name - INV10 Function - Pull the right column wire low when the left one is high. Placement Restrictions - None CIF Number - . Size Column : 1 Row : 1 Row capacitance - Row wire is not passed through this cell. Left Col Capacitance - Right Col Capacitance - Row Resistance - Row wire is not passed through this cell. Transistor size - .5 X .25 mill, or 12 X 6 micron. INV 1 0 .5 X .25 INV 10 n m n i i i i j i zii Figure 3-13: INV10 CELL GRAPHICS, SCHEMATIC AND COMPOSITE PPL Manual 4. COMPLEX ROW CELLS 27 July 1982 COMPLEX ROW CELLS 29 The complex row cells include all flip flops, latches, pass transistors, and any other cell which occupies more than one row cell location. These cells include: - Special inverter: SICUINV - Pass transistor cells: CPT,CPTL,CPTR,RPT1,RPT2,RPTL,RPTR. - Latch cells: LATCH2,LATCH. - Flip flop cells: FF,FFC,FFR,FFW,FFRW. The flip flops and latches present some special problems that should be taken into account: - The latches have internal loads; therefore, no loads should be placed on their input or output vires. - The flip flops have open collector outputs and so should have the CP2L and CP2R loads placed on the 1 and 0 wires. In the case of flip flops to form a buss, only one load should be placed on each of the 2 wires. The loads internal to the flip flop for the S and R wires are isolated from the rest of the PPL when PHI1 is off and so the CP3L and CP3R cells should be placed on the S and R. wires to make them work correctly.PPL Manual 27 July 1982 COMPLEX ROW CELLS Cell Name - SICUINV Function - Same as INV01 but with internal pull-ups. Placement Restrictions - Row : Even CIF Number - Size Column : 1 Row : 1 Row capacitance - Row wire is not passed through this cell. Left Col Capacitance - Right Col Capacitance - Row Resistance - Row wire is not passed through this cell. Transistor size - enhancements .5 X .25 mill, or 12 X 6 micron. depletions .25 X .5 mill, or 6 X 12 micron. 0 + Figure 4-1: SICUINV CELL GRAPHICS , SCHEMATIC AND COMPOSITE Cell Name - CPT Function - Connect the column wires when the row is high. Placement Restrictions - Row : Even CIF Number - Size Column : 1 Row : 2 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - . Transistor size - 2.4 X .25 mill, or 50 X 6 micron. PPL Manual 27 July 1982 COMPLEX ROW CELLS Figure 4-2: CPT CELL GRAPHICS , SCHEMATIC AND COMPOSITE PPL Manual Cell Name - CPTL 27 July 1982 COMPLEX ROW CELLS Function - This cell places a pass-transistor in the left column wire which is activated when the row is high. Placement Restrictions - Row : Odd CIF Number - Size Column : 1 Row : 2 Row capacitance - Left Col Capacitance - . Right Col Capacitance - Row Resistance - Transistor size - 1.35 X .25 mill, or 32 X 6 micron. n "El ZZZ2Z2Z u Figure 4-3: CPTL CELL GRAPHICS , SCHEMATIC AND COMPOSITE PPL Manual Cell Name - CPTR 27 July 1982 COMPLEX ROW CELLS Function - This cell places a pass-transistor in the right column wire which is activated when the row is high. Placement Restrictions - Row : Odd CIF Number - Size Column : 1 • Row : 2 Row capacitance - Left Col Capacitance - . Right Col Capacitance - Row Resistance - - Transistor size - 1.35 X .25 mill, or 32 X 6 micron. r i R HC .35 X .25 CPTR n -a i i 7777 Figure 4-4: CPTR CELL GRAPHICS , SCHEMATIC AND COMPOSITE Cell Name - RPT1 Function - Connect two row wires when left column wire is high. Placement Restrictions - Row : Even CIF Number - Size Column : 1 Row : 2 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - , Transistor size - .9 X .25 mill, or 22 X 6 micron. PPL Manual 27 July 1982 COMPLEX ROW CELLS Figure 4-5: RPT1 CELL GRAPHICS , SCHEMATIC AND COMPOSITE \mlPPL Manual 27 July 1982 COMPLEX ROW CELLS Cell Name - RPT2 Function - Connect two row wires when the right column wire is high. Placement Restrictions - Row : Even CIF Number - ■ Size Column : 1 Row s 2 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - Transistor size - .9 X .25 mill, or 22 X 6 micron. D / i i v\> vi r~i 7f77j; LJ \\V i i y :2ZZ] LJ Figure 4-6: RPT2 CELL GRAPHICS , SCHEMATIC AND COMPOSITE PPL Manual 27 July 1982 COMPLEX ROW CELLS Cell Name - RPTR Function - Insert a pass transistor in an odd row which is activated when the right column wire is high. Placement Restrictions - Row : Even CIF Number - Size Column : 1 Row : 2 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - - Transistor size - 1.4 X .25 mill, or 32 X 6 micron. 1.4 X .2£> i_r" RPTR RPTR i 11 <~Vi mm\ Figure 4-7: RPTR CELL GRAPHICS , SCHEMATIC AND COMPOSITE COMPLEX ROW CELLS Cell Name - RPTL Function - Insert a pass-transistor in an odd row which is activated when the left column wire is high. Placement Restrictions - Row : Even CIF Number - Size Column : 1 Row : 2 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - - Transistor size - 1.4 X .25 mill, or 32 X 6 micron. PPL Manual 27 July 1982 R 1.4 X . 2S 1__1 T RPTL Figure 4-8: RPTL CELL GRAPHICS , SCHEMATIC AND COMPOSITE Cell Name - LATCH2 Function - 2 wire asynchronous latch. Placement Restrictions - Row : Even CIF Number - Size Column : 1 Row : 3 Row capacitance - Row wires are not passed through this cell. Left Col Capacitance - Right Col Capacitance - Row Resistance - Row wires are not passed through this cell. Transistor sizes - pull-ups= .25 X .5 mill, or 6 X 12 micron. enhancements .5 X .25 mill, or 12 X 6 micron. PPL Manual 27 July 1982 COMPLEX ROW CELLS Figure 4-9: LATCH2 CELL GRAPHICS , SCHEMATIC AND COMPOSITE Cell Name - LATCH Function - Asynchronous S-R latch Placement Restrictions - Column : Odd Row : Even CIF Number - Size Column : 2 Row : 3 Row capacitance - Row wires are not passed through this cell. Left Col Capacitance - Right Col Capacitance - Row Resistance - Row wires are not passed through this cell. Transistor sizes - Q1=Q2=Q3=Q4=.25 X .5 mill, or 6 X 12 micron Q5=Q6=Q7=Q8=.5 X .25 mill, or 12 X 6 micron Graphics - Figure 4-10 on page 40 Schematic - Figure 4-11 on page 40 PPL Manual 27 July 1982 COMPLEX ROW CELLS Composite - Figure 4-12 on page 41 PPL Manual 27 July 1982 COMPLEX ROW CELLS 0 R SI _ 0 R 5 1 _ Figure 4-10: LATCH CELL GRAPHICS Figure 4-11: LATCH CELL SCHEMATIC PPL Manual 27 July 1982 COMPLEX ROW CELLS 41 Figure 4-12: LATCH CELL COMPOSITEPPL Manual Cell.Name - FF 27 July 1982 COMPLEX ROW CELLS Function - Syncronous 2 phase Flip-Flop. Placement Restrictions - Column : Odd Row : Even CIF Number - Size Column : 2 Row : 4 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - '• Transistor sizes - Q1=Q2=Q9=Q10= .5 X .25 mill, or 12 X Q3=Q4=Q7=Q8= .25 X .25 mill, or 6 X 6 Q5=Q6= .25 X 2 mill, or 6 X 30 micron Graphics - Figure 4-13 on page 43 Schematic - Figure 4-14 on page 44 i micron, micron. Composite - Figure 4-15 on page 45 PPL Manual 27 July 1982 COMPLEX ROW CELLS 0 R SI PH] 1 0 R SI Figure 4-13: FF CELL GRAPHICS PPL Manual 27 July 1982 COMPLEX ROW CELLS Figure 4-14: FF CELL SCHEMATIC PPL Manual 27 July 1982 COMPLEX ROW CELLS Figure 4-15: FF CELL COMPOSITE PPL Manual Cell Name - FFC 27 July 1982 COMPLEX ROW CELLS Function - Flip-Flop with asynchronous clear. Placement Restrictions - Column : Odd Row : Odd CIF Number - Size Column : 2 Row : 5 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - Transistor sizes - Q1=Q2=Q10=Q11= .5 X .25 mill, or 12 X Q3=Q4=Q7=Q8=Q9= .25 X .25 mill, or 6 X Q5=Q6= .25 X 2 mill, or 6 X 30 micron. Graphics - Figure 4-16 on page 47 Schematic - Figure 4-17 on page 48 micron. 6 micron. Composite - Figure 4-18 on page 49 PPL M a n u a l 27 J u ly 1982 COMPLEX ROW CELLS 0 R SI PHI 1 A Q.EAR 0 R SI F ig u r e 4 - 1 6 : FFC CELL GRAPHICS PPL M a n u a l COMPLEX ROW CELLS 27 J u ly 1982 [ S, 1 31 , II -I I D 2 m nn" IL. 03, \ /__1 1 sjQ4 □5 □6 -tt= □ 7 □S I I =ji- a& IL i r (011 -----'DIB Ft L‘ F ig u r e 4 - 1 7 : FFC CELL SCHEMATIC PPL M a n u a l 27 J u ly 1982 COMPLEX ROW CELLS FFC CELL COMPOSITE PPL M a n u a l 27 J u ly 1982 COMPLEX ROW CELLS Cell Name - FFR Function - Flip-Flop with read enable. Placement Restrictions - Column : Odd Row : Even CIF Number - Size Column : 2 Row : 6 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - Transistor sizes - Q1=Q2= .5 X .25 mill, or 12 X 6 micron. Q3=Q4=Q7=Q8= .25 X .25 mill, or 6 X 6 micron. Q9=Q10=Q11=Q12= 1 X .25 mill, or 24 X 6 micron. Q5=Q6= .25 X 2 mill, or 6 X 30 micron. Graphics - Figure 4-19 on page 51 Schematic - Figure 4-20 on page 52 C om p o s ite - F ig u r e 4 -2 1 on page 53 PPL M a n u a l 27 J u ly 1982 COMPLEX ROW CELLS 0 R SI PHI I READ ENABLE 0 R S 1 F ig u r e 4 - 1 9 : FFR CELL GRAPHICS PPL M a n u a l 27 J u ly 1982 COMPLEX ROW CELLS F ig u r e 4 - 2 0 : FFR CELL SCHEMATIC PPL M a n u a l 2 7 J u ly 1982 COMPLEX ROW CELLS 53 F ig u r e 4 - 2 1 : FFR CELL COMPOSITE PPL M a n u a l 27 J u l y 1982 COMPLEX ROW CELLS Cell Name - FFW Function - Flip-flop with write enable. Placement Restrictions - Column : Odd Row : Even CIF Number - Size Column : 2 " Row : 5 Row capacitance - Left Col Capacitance - Right Col Capacitance - Row Resistance - " Transitor sizes - Q1=Q2=Q3=Q4= 1 X .25 mill, or 24 X 6 micron. Q5=Q6=Q9=Q10= .25 X .25 mill, or 6 X 6 micron. Q7=Q8= .25 X 2 mill, or 6 X 30 micron. Q11=Q12= .5 X .25 mill, or 12 X 6 micron. Graphics - Figure 4-22 on page 55 Schematic - Figure 4-23 on page 56 C om p o s ite - F ig u r e 4 -2 4 on p a g e 57 PPL M a n u a l 27 J u ly 1982 COMPLEX ROW CELLS 0 R 5 1 H?]TE ENABLE PHI 1 A B PH] 2 0 R S 1 F ig u r e 4 - 2 2 : FFW CELL GRAPHICS PPL M a n u a l 27 J u ly 1982 COMPLEX ROW CELLS .r-r 1 hi ' Qi iH 02 "1 1 IL Q3 n 11-1 *-11 J 1 04 L_ 05 \ / ZUT ,06 IF 07 OE -tt OS , r 1 r pr- 010 2 1 01) Ff 'k ioi F ig u r e 4 - 2 3 : FFW CELL SCHEMATIC PPL M a n u a l 27 J u ly 1982 COMPLEX ROW CELLS ZZ2ZZZZ&2 , 1 I I 1 I , 1 i i 1 r Z777 I] [$zz2z?Mz. I , 1 I I r I F ig u r e 4 - 2 4 : FFW CELL COMPOSITE PPL M a n u a l 27 J u l y 1982 COMPLEX ROW CELLS Cell Name - FFRW Function - Flip-flop with both read and write enables. Placement Restrictions - Column : Odd Row : Odd CIF Number - Size Column : 2 Row : 7 Row capacitance - Left Col Capacitance - * Right Col Capacitance - Row Resistance - Transistor sizes - Q1=Q2=Q3=Q4= 1 X .25 mill, or 24 X 6 micron. Q5=Q6=Q9=Q10= .25 X .25 mill, or 6 X 6 micron. Q7=Q8= .25 X 2 mill, or 6 X 30 micron. Q11=Q12=Q13=Q14= 1 X .25 mill, or 24 X 6 micron. Graphics - Figure 4-25 on page 59 Schematic - Figure 4-26 on page 60 • C om p o s ite - F ig u r e 4 -2 7 on p a g e 61 PPL M a n u a l 27 J u ly 1982 INTERCONNECT CELLS 0 R 5 1 WRITE ENABLE PHI 1 RE WRI ENA PHI 2 READ ENABLE 0 R 5 1 F ig u r e 4 - 2 5 : FFRW CELL GRAPHICS INTERCONNECT CELLS PPL M a n u a l 27 J u l y 1982 □l e 03] 02 3+ 04 \E JTl 07 OS 06 JTL os ,_n 011 012 013 1_TLJ OM X. X. FTRW F ig u r e 4 - 2 6 : FFRW CELL SCHEMATIC PPL M a n u a l 27 J u ly 1982 INTERCONNECT CELLS 61 I F ig u r e 4 - 2 7 : FFRW CELL COMPOSITE PPL M a n u a l 27 J u l y 1982 INTERCONNECT CELLS 62 In the current PPL design system, all row cell interconnections have to be explicitly made by the insertion of these cells. A set of break cells are also included to be an aid to the designer in doing the PPL layout. These break cells perform no actual function however, and in order for the circuit to operate correctly all column and row connections must be • explicitly Inserted between the each cell where a connection is desired. Included in these cells are: - Column break cells: RCBK,LCBK,CBRK. - Column connect cells: CCR,CCL,CCN. - Row break cell: RBRK. - Row connect cell: RCN. - Clock connection cells: PH1LCN,PH1RCN,PH2LCN,PH2RCN. Cell Name - CCR Function - Connect right column wire between two row cells. Cell Size Row : .5 Column : .5 . Placement Restrictions Row : None Column : Between CIF number - 5 . INTERCONNECT CELLS □ ca? F ig u r e 5 - 1 : CCR CELL GRAPHICS AND SCHEMATIC PPL Manual Cell Name - CCL 27 J u ly 1982 INTERCONNECT CELLS Function - Connect left column wire between row cells. Cell Size Row : .5 Column : .5 Placement Restrictions Row : None Column : Between CIF number - ca. F ig u r e 5 - 2 : CCL CELL GRAPHICS AND SCHEMATIC INTERCONNECT CELLS Cell Name - CCN Function - Connect both column wires between row cells. Cell Size Row : .5 Column : .5 Placement Restrictions Row : None Column : Between CIF number - PPL M a n u a l 27 J u ly 1982 F ig u r e 5 - 3 : CCN CELL GRAPHICS AND SCHEMATIC INTERCONNECT CELLS Cell Name - RCN Function - Connect row wire between adjacent row cells. Cell Size Row : .5 Column : .5 Placement Restrictions Row : Between Column : None CIF Number - PPL M a n u a l 27 J u ly 1982 CD RCN F i g u r e . 5 - 4 : RCN CELL GRAPHICS AND SCHEMATIC Cell Name - RCBK Function - Indicate where right column wire is to be broken. Cell Size Row : .5 Column : .5 Placement Restrictions - Between any two columns PPL M a n u a l 27 J u ly 1982 INTERCONNECT CELLS F ig u r e 5 - 5 : RCBK CELL GRAPHICS Cell Name - LCBK Function - Indicate where left column wire is to be broken. Cell Size Row : .5 Column : .5 Placement Restrictions - Between any two columns PPL M a n u a l 27 J u ly 1982 INTERCONNECT CELLS F ig u r e 5 - 6 : LCBK CELL GRAPHICS Cell Name - CBRK Function - Indicate where both column wires are to be broken. Cell Size Row : .5 Column : .5 Placement Restrictions - Between any two columns PPL M a n u a l 27 J u ly 1982 INTERCONNECT CELLS F ig u r e 5 - 7 : CBRK CELL GRAPHICS Cell Name - RBRK Function - Indicate where row is to be broken, (not a physical cell.) Cell Size Row : .5 Column : .5 Placement Restrictions - Between any two rows PPL M a n u a l 27 J u ly 1982 INTERCONNECT CELLS F ig u r e 5 - 8 : RBRK CELL GRAPHICS Cell Name - PH1LCN Function - Connect PHI 1 clock to left side of circuit. Placement Restrictions - Column : Even Row : None To side of : Where needed CIF Number - Size Column : 1 Row : 1 Cell capacitance - Cell Resistance - PPL M a n u a l 27 J u ly 1982 INTERCONNECT CELLS V////z a Q_ philcnJ F ig u r e 5 - 9 : PH1LCN CELL GRAPHICS , SCHEMATIC AND COMPOSITE Cell Name - PH1RCN Function - Connect PHI 1 clock to right side of circuit. Placement Restrictions - Column : Odd Row : None To side of : Where needed CIF Number - Size Column : 1 Row : 1 Cell capacitance - Cell Resistance - PPL M a n u a l 27 J u ly 1982 INTERCONNECT CELLS "U ZZZZZ phircnT F ig u r e 5 - 1 0 : PH1RCN CELL GRAPHICS , SCHEMATIC AND COMPOSITE Cell Name - PH2LCN PPL M a n u a l 27 J u ly 1982 INTERCONNECT CELLS Function - Connect PHI 2 clock to left side of circuit. Placement Restrictions - Column : Even Row : None To side of : Where needed CIF Number - Size Column : 1 Row : 1 Cell capacitance - Cell Resistance - zzz CVJ □ PH2LCN CL_ F ig u r e 5 -1 Is PH2LCN CELL GRAPHICS , SCHEMATIC AND COMPOSITE Cell Name - PH2RCN PPL M a n u a l 27 J u ly 1982 INTERCONNECT CELLS Function - Connect PHI 2 clock to right side of circuit. Placement Restrictions - Column : Odd Row : None To side of : Where needed CIF Number - Size Column : 1 Row : 1 Cell capacitance - Cell Resistance - PH2RCN ro F ig u r e 5 - 1 2 : PH2RCN CELL GRAPHICS , SCHEMATIC AND COMPOSITE PPL M a n u a l 6 . PULL-UP CELLS 27 J u ly 1982 PULL-UP CELLS 74 The load cells contained here are required for proper operation of the PPL. Care should be taken that the conventional 4:1 and 8:1 ratios are observed between pullups and pulldowns where non-standard usage of the loads is concerned. • Cell Name - RPU Function - Pull up a row wire. Cell Size Row : 1 Column : 1 Placement Restrictions Row : None Column : None Under Or Over : Anything Transitor Size Metric : 6 X 12 u English : .25 X .5 mill RPU Lm] ■ .25 X .5 RPU F ig u r e 6 - 1 : RPU CELL GRAPHICS , SCHEMATIC AND COMPOSITE PPL Manual Cell Name - CP1L 27 J u ly 1982 PULL-U? CELLS Function - Pull up left column wire on a column with no flip-flops or latches. Cell Size Row : 1 Column : 1 Placement Restrictions Row : None Column : None Under Or Over : No flip-flop or latch Transitor Size Metric : 6 X 12 u English : .25 X .5 mill D UTUi 25 X .5 CPIL F ig u r e 6 - 2 : CP1L CELL GRAPHICS , SCHEMATIC AND COMPOSITE PPL M a n u a l C e l l Name - CP1R 27 J u ly 1982 PULL-UP CELLS Function - Pull up right column wire on a column with no flip-flops or latches. Cell Size - Row : 1 Column : 1 ' . Placement Restrictions Row : None Column : None Under Or Over : No flip-flop or latch Transitor Size Metric s 6 X 12 u English : .25 X .5 mill D _mL .25 X .5 CP1R F ig u r e 6 - 3 : CP1R CELL GRAPHICS , SCHEMATIC AND COMPOSITE PPL M a n u a l 27 J u ly 1982 PULL-UP CELLS Cell Name - CP2L Function - Pull up 0 column wire of a flip-flop. Cell Size Row : 1 Column : 1 Placement Restrictions Row : None Column : Odd Under Or Over : (FF,FFR,FFW,FFRW,FFC) Transitor Size Metric : 6 X 24 u English : .25 X 1.0 mill F ig u r e 6 - 4 : CP2L CELL GRAPHICS , SCHEMATIC AND COMPOSITE PULL-UP CELLS Cell Name - CP2R Function - Pull up the 1 column wire of a flip-flop. Cell Size Row : 1 Column : 1 Placement Restrictions Row : None Column : Even Under Or Over : (FF,FFR,FFW,FFRW,FFC) Transitor Size Metric : 6 X 24 u . English : .25 X 1.0 mill PPL M a n u a l 27 J u ly 1982 D 2 .25 X J CP2R F ig u r e 6 - 5 : CP2R CELL GRAPHICS , SCHEMATIC AND COMPOSITE PULL-UP CELLS Cell Name - CP3L Function - Pull up the S column wire of a flip-flop. Cell Size Row : 2 Column : 1 Placement Restrictions Row : Even Column : Even Under Or Over : (FF,FFR,FFW,FFRW,FFC) Transitor Size Metric : 6 X 48 u English : .25 X 2.0 mill PPL M a n u a l 27 J u ly 1982 F ig u r e 6 - 6 : CP3L CELL GRAPHICS , SCHEMATIC AND COMPOSITE PPL M a n u a l 27 J u ly 1982 PULL-UP CELLS Cell Name - CP3R Function - Pull up the R column wire of a flip-flop. Cell Size Row : 2 Column : 1 Placement Restrictions Row : Even Column : Odd Under Or Over s (FF,FFR,FFW,FFRW,FFC) Transitor Size Metric : 6 X 48 u English : .25 X 2.0 mill CPU 3 ! I I I F ig u r e 6 - 7 : CP3R CELL GRAPHICS , SCHEMATIC AND COMPOSITE PPL M a n u a l 27 J u ly 1982 81 BUSSIN3 CELLS 7. BOSSING CELLS The bussing cells Include: - BUSS cells: VBUS,GBUS,RCAP,LCAP,CKCN. ■ - BUSS Jumper cells: VJR,VJL,G JR,GJL. These cells are used to supply power, ground, and clocks to the PPL circuit. They are also used to output and input signals to/from the PPL circuit. These cells must be placed around the perimeter of the PPL in order for it to operate correctly. The VBUS and its associated Jumpers must be placed along the top of the array, the GBUS and its jumpers go on the bottom. The LCAP and RCAP cells go on the left and right sides of the array respectively. The CKCN cell is used to take the clock signals carried in the LCAP and RCAP cells route them under the GBUS cell. In this way the clock can be supplied to both sides of the circuit. Do not use the CKCN cell anywhere other than the lower left and right corners of the circuit - leave the upper left and right corners empty. A sample circuit is shown at the end of this manual.BUSSING CELLS Cell Name - VBUS Function - Supply Vdd to circuit Placement Restrictions - Column : None Row : Even Over : Complete circuit CIF Number - Size Row : 2 Column : 1 Cell capacitance - Cell resistance - PPL M a n u a l 27 J u l y 1982 VBUS L 1 Figure 7-1: VBUS CELL GRAPHICS , SCHEMATIC AND COMPOSITEPPL M a n u a l 27 J u ly 1982 BUSSING CELLS Cell Name - GBUS Function - Supply ground to the circuit, and chanel clock wires across the circuit. Placement Restrictions - Column : None CIF Number - Size Column : 1 Row : 2 Cell capacitance - Cell resistance - Row Under Odd Complete circuit 1------1 r GBUS L _j PHJ 2 PHI 1 Figure 7-2: GBUS CELL GRAPHICS , SCHEMATIC AND COMPOSITECell Name - CKCN Function - Connect side clock wires to clock wires in GBUS Placement Restrictions - Lower left and right corners CIF Number - Size Column : 1 Row : 2 Cell capacitance - Cell resistance - PPL M a n u a l 27 J u ly 1982 BUSSING CELLS F ig u r e 7 - 3 : CKCN CELL GRAPHICS , SCHEMATIC AND COMPOSITE FPL M a n u a l 27 J u ly 1982 BUSSING CELLS Cell Name - VJR Function - Extend right column wire beyond VBUS for connection to pad. Placement Restrictions - Column : None Row : Even Over : Where needed • CIF Number - Size Column : 1 Row : 2 Cell capacitance - Cell Resistance - I VJR VI / / / / / il F ig u r e 7 - 4 : VJR CELL GRAPHICS , SCHEMATIC AND COMPOSITE PPL M a n u a l 27 J u ly 1982 BUSSING CELLS Cell Name - VJL Function - Extend left column wire past VBUS for connection to pad. Placement Restrictions - Column s None Row : Even Over : Where needed CIF Number - Size Column : 1 Row : 2 Cell capacitance - Cell Resistance - □ VJL J } ' / / / / / Id F ig u r e 7 - 5 : VJL CELL GRAPHICS , SCHEMATIC AND COMPOSITE PPL M a n u a l 27 J u ly 1982 BUSSING CELLS Cell Name - GJR Function - Extend right column wire past GBUS for conection to pad. Placement Restrictions - Column : None CIF Number - Size Column : 1 Row : 2 Cell capacitance - Cell resistance - Row Under Odd Where needed n GJR v / / / / / / F ig u r e 7 - 6 : GJR CELL GRAPHICS , SCHEMATIC AND COMPOSITE Cell Name - GJL Function - Extend left column wire past GBUS for connection to pad. Placement Restrictions - Column : None Row : Odd . Under : Where needed CIF Number - Size Column : 1 Row : 2 Cell capacitance - Cell resistance - J? PPL M a n u a l 27 J u ly 1982 BUSSING CELLS 1 / / / / / / F ig u r e 7 - 7 : GJL CELL GRAPHICS , SCHEMATIC AND COMPOSITE PPL M a n u a l 2 7 J u ly 1982 BUSSING CELLS Cell Name - LCAP Function - Supply clocks to right edge of circuit. Placement Restrictions - Column : Even Row : None To side of : Complete circuit CIF Number - Size Column : 1 Row : 1 Cell capacitance - Cell resistance - lca£ E I I F ig u r e 7 - 8 : LCAP CELL GRAPHICS , SCHEMATIC AND COMPOSITE PPL Manual Cell Name - RCAP 27 J u ly 1982 BUSSING CELLS Function - Supply clocks to right edge of circuit. Placement Restrictions - Column : Odd Row : None To side of : Complete circuit CIF Number - Size Column : 1 Row : 1 Cell capacitance - Cell Resistance - rr> E RCAP_ E I I I I I I I I I I I I F ig u r e 7 - 9 : RCAP CELL GRAPHICS , SCHEMATIC AND COMPOSITE PPL M a n u a l 27 J u ly 1982 PAD CELLS 91 8. PAD CELLS The pad cells are intended to provide the connection from the PPL circuit to the external world and to define the boundary of the die which contains the circuit. The cells are all a multiple of 6 mills in width with their origin in the middle of the pad, their left edge 3 mills from the origin and their right edge 3> 9 or 15 mills from the origin. At the top of each cell is a section of VDD and Ground buss, and at the bottom is a section of 5 mill wide scribe line. The top of the cell is about 7 mills from the origin and the bottom is 8 or 9 mills from the orign depending on the amount of overlap with the scribe line of the next die that is desired (1 or 2 mills). Corner cells differ from the other Pad Cells in that they have scribe line on both the bottom and left sides. The distance from the origin to the left edge of a corner cell is 8 or 9 mills and the distance to the top is 9. The right edge is at a distance of 9 or 15 mills. Pad cells are inserted on a 3 mill grid. The bottom and bottom left corner of the die are formed from Pad Cells inserted with A=0. The right edge and right bottom corner require A=90, the top and top right corner, A=180, and the left and top left corner, A=270. The Pad cells consist of: 1. Input pads: BLKPAD, IPROPAD, IBUFPAD, and CIBUFPAD. 2. Output pads: BLKPAD, OBUFPAD, and COBUFPAD 3. Input and Output pads: OCBUFPAD 4. Power pads: VDDPAD and GNDPAD. 5. Fill pads: FILLPAD and CORNERPAD.PPL M a n u a l 27 J u ly 1982 92 PAD CELLS Cell Name - BLKPAD Function - This cell consists of a pad with a metal leader. It may be used for either input or output were buffering and/or protection are not required. Width - 12 mils - . Placement Restrictions - Edge CIF Number - Graphics - Figure 8-1 on page 93 Schematic - Figure 8-2 on page 94 - Composite - Figure 8-3 on page 95PPL M a n u a l 27 J u ly 1982 PAD CELLS F ig u r e 8 - 1 : BLKPAD CELL GRAPHICS PPL M a n u a l 27 J u l y 1982 PAD CELLS VDD GND PAD BLKPAD SCRIBE LANE F ig u r e 8 - 2 : BLKPAD CELL SCHEMATIC PPL M a n u a l 27 J u ly 1982 PAD CELLS r ' L r ' L 1 . j 1 r? Ll WWW ♦VAVAV.VAV.V.V. vKv.v IwXw *V»VAV Iw.v.v .v«v«w w.v.v WWW ;%vlv,v wtv*v /AVAV.VAVAV.V. wJavw/wKv wXwwww.v. >X<<<<%SwXvi*Xv! WAVWW//AW. r*%>Y#V«V*V*>V4V*y 4.44444 IvIvav AVAS.V ^♦V«V«V«VAV«V»VV F ig u r e 8 - 3 : BLKPAD CELL COMPOSITE Cell Name - IPROPAD Function - This cell consists of a pad with an input protection device. Width - 12 mils Placement Restrictions - Edge ' . CIF Number - Transistor size - 5 X .5 mill, or 120.5 X 6 micron Graphics - Figure 8-4 on page 97 Schematic - Figure 8-5 on page 98 - Composite - Figure 8-6 on page 99 PPL M a n u a l 27 J u ly 1982 PAD CELLS PPL M a n u a l 27 J u ly 1982 PAD CELLS F ig u r e 8 - 4 : IPROPAD CELL GRAPHICS PPL M a n u a l 27 J u l y 1982 PAD CELLS 98 IPROPAD SCRIBE LANE F i g u r e , 8 - 5 : IPROPAD CELL SCHEMATIC PPL M a n u a l 27 J u ly 1982 PAD CELLS 99 F ig u r e 8 - 6 : IPROPAD CELL COMPOSITE Cell Name - IBUFPAD Function - This cell consists of pad with input protection and an inverting input buffer. Width - 12 mils ' Placement Restrictions - Edge CIF Number - Transistor sizes - Q1=.25 X .25 mill, or 6 X 6 micron Q2=2 X .25 mill, or 48 X 6 micron Q3=5 X .5 mill, or 120.5 X 6 micron Graphics - Figure 8-7 on page 101 Schematic - Figure 8-8 on page 102 Composite - Figure 8-9 on page 103 PPL M a n u a l 27 J u ly 1982 PAD CELLS 100 PPL M a n u a l 27 J u ly 1982 PAD CELLS F ig u r e 8 - 7 : IBUFPAD CELL GRAPHICS PPL M a n u a l 27 J u ly 1982 PAD CELLS 1 0 2 IBUFPAD SCRIBE LANE F ig u r e 8 - 8 : IBUFPAD CELL SCHEMATIC PPL M a n u a l 27 J u ly 1982 PAD CELLS ww wwtvWv.vHv wwww.v.v '«V«VAV WAV.V wXv.v vXv.vj VAVA* AW V,V( vvvs WAViV rvAViVi *4*4*441 wXvIv vKvKvi wKviv w.w.v v*v< •;w M^M wJwawwv? wwJXwKw ToVoa*a*x*>>>> »>♦« WMmzm 4V4V44VI v«v wnA >444>4^444444A44>44 k\*J.\dlT4rA\A«\AAA«A %%VAVWl W*V*V*1 F ig u r e 8 - 9 : IBUFPAD CELL COMPOSITE Cell Name - CIBUFPAD PPL M a n u a l 27 J u l y 1982 PAD CELLS Function - Identical to the IBUFPAD cell except for corner placement. Width - 17 or 18 mils Placement Restrictions - Corner ' CIF Number - Transistor sizes - Q1=.25 X .25 mill, or 6 X 6 micron Q2=2 X .25 mill, or 48 X 6 micron Q3=5 X .5 mill, or 120.5 X 6 micron Graphics - Figure 8-10 on page 105 - Schematic - Figure 8-11 on page 106 , Composite - Figure 8-12 on page 107PAD CELLS PPL M a n u a l . 27 J u ly 1982 F ig u r e 8 - 1 0 : CIBUFPAD CELL GRAPHICS PPL M a n u a l 27 J u l y 1982 PAD CELLS 106 F ig u r e 8 - 1 1 : CIBUFPAD CELL SCHEMATIC PPL M a n u a l 27 J u ly 1982 PAD CELLS F ig u r e 8 - 1 2 : CIBUFPAD CELL COMPOSITE PPL M a n u a l 27 J u ly 1982 108 PAD CELLS Cell Name - OBUFPAD Function - This cell consists of a pad driven by an inverting output superbuffer. The output is TTL compatable and is capable of driving one standard load. Width - 18 mils ' . Placement Restrictions - Edge CIF Number - Transistor sizes - Q1=.25 X .25 mill, or 6 X 6 micron Q2=.25 X .25 mill, or 6 X 6 micron Q3=13-7 X .25 mill, or 258 X 6 micron - Q4 = 1 X .25 mill, or 24 X 6 micron Q5=1 X .25 mill, or 24 X 6 micron Q6=11.15 X .25 mill, or 199-5 X 6 micron Graphics - Figure 8-13 on page 109 Schematic - Figure 8-14 on page 110 C om p o s ite - F ig u r e 8 -1 5 on page 111 PPL Manual PAD CELLS 27 July 1982 Figure 8-13: OBUFPAD CELL GRAPHICS PAD CELLS PPL Manual 27 July 1982 INPUT OBUFPAD SCRIBE LANE Figure 8-14: OBUFPAD CELL SCHEMATIC PPL Manual 2 7 J u l y 1 9 8 2 PAD C E L LS kW>5< Figure 8-15: OBUFPAD C E L L COMPOSITE PPL Manual 27 July 1982 112 PAD CELLS Cell Name - COBUFPAD Function - Identical to OBUFPAD except for corner placemant. Width - 23 or 24 mils Placement Restrictions - Corner CIF Number - Transistor sizes - Q1=.25 X .25 mill, or 6 X 6 micron Q2=.25 X .25 mill, or 6 X 6 micron Q3=13*7 X .25 mill, or 258 X 6 micron Q4 = 1 X .25 mill, or 24 X 6 micron Q5=1 X .25 mill, or 24 X 6 micron Q6 = 11.15 X .25 mill, or 199*5 X 6 micron Graphics - Figure 8-16 on page 113 Schematic - Figure 8-17 on page 114 Composite - Figure 8-18 on page 115PPL Manual 27 July 1982 113 PAD CELLS ni d - UU rU FSIFFR -----------n--------------r Figure 8-16: COBUFPAD CELL GRAPHICS PPL Manual 27 July 1982 PAD C E L LS VDD GND INPLT nP1 i-l HP2 □3 Q A 05 □6 COBUFPAD SCRIBE LANE Figure 8-17: COBUFPAD CELL SCHEMATIC PPL Manual 27 July 1982 115 PAD CELLS Figure 8-18: COBUFPAD CELL COMPOSITE PPL Manual 27 July 1982 116 PAD CELLS Cell Name - OCBUFPAD Function - This pad is an open drain input-output pad with selectable pullup. The pad is driven by an inverting, open drain buffer. A selectable pullup is provided by a depletion load connected to the enhancement driver through a pass transistor. The gate of the pass transisitor should be tied high to enable the pullup and tied low to disable it. With the pullup enabled, the driver is TTL compatable and will drive 1 standard load. Input from the pad is through the standard inverting input driver. There is no input protection. Width - 18 Mills. Placement Restrictions - Edge. CIF Number - . Transistor sizes - Q1=.25 X .5 mill. Q2=1 X .25 mill. Q3 = .25 X .'25 mill. Q4=.5 X .25 mill. Q5=.25 X .25 mill. Q6=1 X .25 mill. Q7=3 X .25 mill. <28=3.65 X .25 mill. Q9=15.8 X .25 mill. Graphics - Figure 8-19 on page 117 Schematic - Figure 8-20 on page 118 Composite - Figure 8-21 on page 119 PPL Manual 27 July 1982 PAD CELLS 11 7 Figure 8-19J 0C3UFPAD CELL GRAPHICS PPL Manual 27 July 1982 PAD CELLS 118 INPUT 1NV OUT PULL UP OCBUFPAD SCRIBE LANE Figure 8-20: OCBUFPAD CELL SCHEMATIC PPL Manual 27 July 1982 119 PAD CELLS r "i _ j "i . _ j j IVAW *%%v5v WAV 38$$ WAV WAV tvKvJ v«Wa Figure 8-21: OCBUFPAD CELL COMPOSITE PPL Manual 27 July 1982 PAD CELLS 120 Cell Name - VDDPAD Function - This cell consists of a pad connected to the Vdd (inner) buss. The Ground buss is interupted by this cell. Width - 17 or 18 mils Placement Restrictions - Corner CIF Number - Graphics - Figure 8-22 on page 121 Schematic - Figure 8-23 on page 122 Composite - Figure 8-24 on page 123PPL Manual 27 July 1982 PAD CELLS 121 Figure 8-22: VDDPAD CELL GRAPHICS PPL Manual 27 July 1982 PAD CELLS 122 VDDPAD SCRIBE LANE Figure 8-23: VDDPAD CELL SCHEMATIC PPL Manual 27 July 1982 PAD CELLS 123 Figure 8-24: VDDPAD CELL COMPOSITE Cell Name - GNDPAD Function - This cell consists of a pad connected to the Ground (inner) buss. The Vdd buss is interupted by this cell Width - 23 or 24 mils Placement Restrictions - Corner CIF Number - Graphics - Figure 8-25 on page 125 Schematic - Figure 8-26 on page 126 Composite - Figure 8-27 on page 127 PPL Manual ' 27 July 1982 PAD CELLS PPL Manual 27 July 1982 PAD CELLS 125 Figure 8-25: GKDPAD CELL GRAPHICS PPL Manual 27 July 1982 PAD CELLS 126 GNDPAD SCRIBE LANE Figure 8-26: GNDPAD CELL SCHEMATIC PPL Manual 27 July 1982 PAD CELLS 127 Figure 8-27: GNDPAD CELL COMPOSITE PPL Manual 27 July 1982 PAD CELLS Cell Name - FILLPAD Function - This cell consists of a 6 mil wide section of scribe line and Power and Ground buss. It is used to fill in the edge of a die where pads are not desired. Width - 6 mils • Placement Restrictions - Edge CIF Number - Graphics - Figure 8-28 on page 129 Schematic - Figure 8-29 on page 130 ' Composite - Figure 8-30 on page 131PPL Manual 27 July 1982 PAD CELLS Figure 8-28: FILLPAD CELL GRAPHICS PPL Manual 27 July 1982 PAD CELLS Figure VDD GND FILLPAD SCRIBE LANE 8-29: FILLPAD CELL SCHEMATIC PPL Manual 27 July 1982 PAD CELLS L L 1 1 Figure 8-30: FILLPAD CELL COMPOSITE Cell Name - CORNERPAD Function - Like the Fillpad except for corners. Width - 17 or 18 mils Placement Restrictions - Corner CIF Number - Graphics - Figure 8-31 on page 133 Schematic - Figure 8-32 on page 134 Composite - Figure 8-33 on page 135 PPL Manual 27 July 1982 PAD CELLS CONCLUSIONS PPL Manual 27 July 1982 Figure 8-31: CORNERPAD CELL GRAPHICS PPL Manual 27 July 1982 CONCLUSIONS V[>D GND CORNERPAD SCRIBE LANE Figure 8-32: CORNERPAD CELL SCHEMATIC PPL Manual 27 July 1982 CONCLUSIONS 135 Figure 8-33: CORNERPAD CELL COMPOSITE PPL Manual 27 July 1982 CONCLUSIONS 136 9- CONCLUSIONS When using the CV system to build circuits with the PPL cell set the following procedure should be followed. 1. SELECT DIRECTORY yourdirectory 2. For english circuits: DEL FIL CDEF**.US COPY FIL FROM: EPPL.DOC>CDEF.ECEL TO: CDEF**.US - (This will copy the correct menu file to the station you are working on.) a. SETUP (this command is on the digitizer pad of the CV and will set up the parameters correctly for that station.) The MRU will be M=1E-5,S=E,U=100. And the grid will be X=2.15,Y=1.55,D=1. b. SELECT PRED dirname>EPPL.x (WHERE x is GRP,CKT, or SCHEM) For metric circuits: DEL FIL CDEF**.US COPY FIL FROM: NMOS6.DOOCDEF.MCEL TO: CDEF**.US (this will copy the correct menu file to the station you are working on.) a. SETUP (from digitizer pad.) The MRU for the metric version is M=25E-6,S=M,U=4. And the grid is X=52,Y=35. b. SELECT PRED dirname>NM0S6.* (WHERE * is GRP,CKT or SCHEM) When referring to either version of the cell set the directory extension GRP refers to the graphics directory, CKT refers to the composite directory, and SCHEM refers to the schematic directory. When inserting the cells into your circuit you MUST use the menu pad in order for the cells to be inserted in the correct locations and with the proper tags. These tags are used by the program which flips the cells after the circuit has been completed and before the pads have been inserted. After inserting all of the logical cells it is then necessary to insert row and column pull-up cells on all rows and columns which do not have cells with built in pull-ups. The remainder of the area must be filled with blank (BLK) cells to complete the rectangular area bounded by the outer cells. VBUS,GBUS,RCAP, LCAP, and CKCN cells must then be inserted around the borderPPL Manual 27 July 1982 137 CONCLUSIONS of the circuit (see the individual documentation for these cells). The final processing step on the active PPL area is to flip the cells. This is done because the cells share power and ground and contacts to conserve space. These programs need to be run from the menu. They are called 'Flip even rows' and 'Flip even columns'. They prompt the user to digitize the beginning location and then flip every other row or column location in the circuit. To flip the rows, digitize to the left of the lower left corner of the LCAP in the lower left corner of the circuit. To flip the columns, digitize one row below the previous digitize. To determine that this was done correctly, you should make sure that the LCAP cells and the VBUSS cells get mirrored. After running both programs do 'SEL PRED directory>x.y' (where -x is EPPL or NM0S6 and y is CKT or SCHEM.) This will reset any changes made to the predecessor structure by the mirroring programs. When the cells have been properly flipped, the pads may be inserted by selecting the pad grid and inserting the pads from the menu. Wires should be run from the pads to the circuit by selecting the wire grid and inserting metal wires of width W=.3 mill or 7 microns. Figure 9-1 shows a complete PPL design of a simple counter. Notice the placement of the bussing cells used to complete the structure.