Decomposing the proof of correctness of pipelined microprocessors

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Publication Type technical report
School or College College of Engineering
Department Computing, School of
Creator Gopalakrishnan, Ganesh
Other Author Hosabettu, Ravi; Srivas, Mandayam
Title Decomposing the proof of correctness of pipelined microprocessors
Date 1998
Description We present a systematic approach to decompose and incrementally build the proof of correctness of pipelined microprocessors. The central idea is to construct the abstraction function using completion functions, one per unfinished instruction, each of which specify the effect (on the observables) of completing the instruction. In addition to avoiding term-size and case explosion as could happen for deep and complex pipelines during flushing and helping localize errors, our method can also handle stages with iterative loops. The technique is illustrated on pipelined- as well as a superscalar pipelined implementations of a subset of the DLX architecture.
Type Text
Publisher University of Utah
Subject Pipelined microprocessors; Proof of correctness
Subject LCSH Pipelining (Electronics)
Language eng
Bibliographic Citation Hosabettu, R., Srivas, M., & Gopalakrishnan, G. (1998). Decomposing the proof of correctness of pipelined microprocessors. UUCS-98-002.
Series University of Utah Computer Science Technical Report
Relation is Part of ARPANET
Rights Management ©University of Utah
Format Medium application/pdf
Format Extent 2,921,127 bytes
Identifier ir-main,15922
ARK ark:/87278/s6c82tf6
Setname ir_uspace
ID 703197
Reference URL https://collections.lib.utah.edu/ark:/87278/s6c82tf6
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