Radiation hardening by design of asynchronous logic for hostile environments

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Publication Type Journal Article
School or College College of Engineering
Department Electrical & Computer Engineering
Creator Stevens, Kenneth
Other Author Barnhart, David J.; Vladimirova, Tanya; Sweeting, Martin N.
Title Radiation hardening by design of asynchronous logic for hostile environments
Date 2009
Description A wide range of emerging applications is driving the development of wireless sensor node technology towards a monolithic system-on-a-chip implementation. Of particular interest are hostile environment scenarios where radiation and thermal extremes exist. Radiation hardening by design has been recognized for over a decade as an alternative open-source circuit design approach to mitigate a spectrum of radiation effects, but has significant power and area penalties. Similarly, asynchronous logic design offers potential power savings and performance improvements, with a tradeoff in design complexity and a lesser area penalty. These side effects have prevented wider acceptance of both design approaches. A case study supporting the development of monolithic system-on-a-chip wireless sensor nodes is presented. Synchronous, hardened, and asynchronous/hardened implementations of a textbook microprocessor in 0.35 m austriamicrosystems SiGe BiCMOS technology are compared. The synergy of this novel asynchronous/hardened design approach is confirmed by simulation and hardware results.
Type Text
Publisher Institute of Electrical and Electronics Engineers (IEEE)
Volume 44
Issue 5
First Page 1617
Last Page 1628
Language eng
Bibliographic Citation Barnhart, D. J., Vladimirova, T., Sweeting, M. N., & Stevens, K. S. (2009). Radiation hardening by design of asynchronous logic for hostile environments. IEEE Journal of Solid State Circuits, 44(5), 1617-28. May.
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Format Medium application/pdf
Format Extent 3,481,083 bytes
Identifier ir-main,15273
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Reference URL https://collections.lib.utah.edu/ark:/87278/s6kd2g0g
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