From Algebraic Specifications to Correct VLSI Systems

This dissertation presents a hardware design methodology in which hardware systems can be modeled as abstract data types and semi-automatically synthesized into VLSI circuits. The behavior of a module is specified at both the abstract and the realization levels, in a purely functional language, "Structure and Behavior Language" (SBL). In a top-down design refinement phase, SBL specifications are manually refined by writing realization specifications that are equivalent to existing abstract specifications. The refinement process is manually directed in such a way that the leaf modules are eventually available in a module library. In a bottom-up circuit synthesis phase, controller modules are automatically synthesized from SBL specifications, and are incorporated along with previously built data-path modules. Routing is performed using module interconnections that are also automatically inferred from SBL specifications. Formal verification and simulation are supported. Test-case selection for simulation can be guided by the equational invariants obtainable from algebraic specifications.