| Publication Type |
Journal Article |
| School or College |
College of Engineering |
| Department |
Computing, School of |
| Creator |
Brunvand, Erik L. |
| Other Author |
Pagey, Sandeep; Khoche, Ajay |
| Title |
DFT for fast testing of self-timed control circuits |
| Date |
1995 |
| Description |
In this paper, we present a methodology to perform fast testing of the control path of self-timed circuits [91]. The speedup is achieved by testing all the execution paths in the control simultaneously. The circuits considered in this paper are those designed using an OCCAM based circuit compiler 121. This Compiler translates an OCCAM program description into an interconnection of pre-existing self-timed macro-modules (2, 10]. The method proposed involves modifying certain modules and structures in such a way that the circuits obtained by translation using these modified modules are testable in above mentioned way. |
| Type |
Text |
| Publisher |
Institute of Electrical and Electronics Engineers (IEEE) |
| First Page |
382 |
| Last Page |
386 |
| Language |
eng |
| Bibliographic Citation |
Pagey, S., Khoche, A., & Brunvand, E. L. (1995). DFT for fast testing of self-timed control circuits. 4th IEEE Asian Test Symposium, 382-6. |
| Rights Management |
(c) 1995 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. |
| Format Medium |
application/pdf |
| Format Extent |
607,933 bytes |
| Identifier |
ir-main,15750 |
| ARK |
ark:/87278/s67h238f |
| Setname |
ir_uspace |
| ID |
707430 |
| Reference URL |
https://collections.lib.utah.edu/ark:/87278/s67h238f |
