Design goals of an editor for storage logic arrays

Abstract: Integrated circuits of increased density require both better fabrication technology and tools for managing the design complexity. Before stepping firmly into the era of Very Large Scale Integration (VLSI), powerful abstractions of integrated circuit design and associated software tools must be developed. Storage Logic Arrays (SLA's) is one such methodology for integrated circuit specification. SLA's provide for the design of circuits at a higher level of abstraction than the composite layout level at which most integrated circuit design has been done. This work describes issues relating to the design of an editor (a software tool) for Storage Logic Arrays. The design objectives seek to provide the basic features of a computer aided design system and some features not provided in typical present day systems. These include: documentation of the basic component parts of the design, provision for visual recognition of individual component parts, and allowing for simulation and verification tests to be performed during the design process. The design specification includes: data structuring sufficient for all design goals to be achieved, functional specification of how the user and the system perform the basic editing operations, and the essential qualities required of a display monitor, host computer, and language system that facilitate the realization of the editor.