Publication Type |
Journal Article |
School or College |
College of Engineering |
Department |
Computing, School of |
Creator |
Brunvand, Erik L.; Gopalakrishnan, Ganesh; Hurdle, John Franklin |
Other Author |
Josephson, Lüli |
Title |
Reliable interface design for combining asynchronous and synchronous circuits |
Date |
1993 |
Description |
Abstract: In order to successfully integrate asynchronous and synchronous designs, great care must be taken at the interface between the two types of systems. Synchronizing asynchronous inputs with a free running clock can cause well-known problems with metastability in the synchronization circuits. Stretchable clocks allow a clock cycle to expand dynamically in response to the metastability effects of sampling asynchronous inputs. We use an interface organization where the special circuitry for detecting metastability and for stretching the clock that is delivered to the synchronous part of the system is encapsulated in a Q-flop-based interface. This provides a very convenient method for interfacing mixed systems, as the interface and clock generation circuitry are isolated into one special module, and neither the asynchronous nor the synchronous system need be modified internally to accommodate the interface. This is especially important when standard synchronous components are used as there is no opportunity to modify these parts. We show that this interface module is suitable for most mixed design needs and conclude with an example. |
Type |
Text |
Publisher |
Institute of Electrical and Electronics Engineers (IEEE) |
First Page |
1 |
Last Page |
11 |
Language |
eng |
Bibliographic Citation |
Josephson, L., Brunvand, E. L., Hurdle, J. F., & Gopalakrishnan, G. (1993). Reliable interface design for combining asynchronous and synchronous circuits. In Fifth NASA Symposium on VLSI Design, 1-11. November. |
Rights Management |
(c) 1993 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. |
Format Medium |
application/pdf |
Format Extent |
378,428 bytes |
Identifier |
ir-main,15766 |
ARK |
ark:/87278/s6g457cz |
Setname |
ir_uspace |
ID |
702410 |
Reference URL |
https://collections.lib.utah.edu/ark:/87278/s6g457cz |