Publication Type |
Journal Article |
School or College |
College of Engineering |
Department |
Electrical & Computer Engineering |
Creator |
Harrison, Reid R.;Normann, Richard A. |
Other Author |
Watkins, Paul T.; Kier, Ryan J.; Black, Daniel J.; Lovejoy, Robert O.; Solzbacher, Florian |
Title |
Design and testing of an integrated circuit for multi-electrode neural recording |
Date |
2007-01 |
Description |
We have developed a single-chip neural recording system with wireless power delivery and telemetry. The 0.5-μm CMOS IC is designed to be bonded to the back of a 100-channel Utah Electrode Array. A pad near each amplifier allows connection of the chip to the MEMS electrode array. The complete Integrated Neural Interface will receive power wirelessly through a 2.64-MHz inductive link. A clock, regulated supply, and commands are derived from the power signal .The neural amplifiers each have a gain of 60 dB. A 10-bit charge-redistribution ADC is used to digitize the signal from one amplifier selected with an analog MUX. Digitizing all channels simultaneously would generate prohibitively high data rates; therefore, we perform data reduction by incorporating one-bit "spike detectors" into each amplifier. Neural data is transmitted off chip using an -integrated 433-MHz FSK transmitter. The chip measures 4.7×5.9 mm2 and consumes 13.5 mW of power. |
Type |
Text |
Publisher |
Institute of Electrical and Electronics Engineers (IEEE) |
First Page |
907 |
Last Page |
912 |
DOI |
10.1109/VLSID.2007.63 |
Subject |
recording; Neural recording; Utah Electrode Array; Multielectrode arrays (MEA); Telemetry; Spike detectors; Wireless |
Subject LCSH |
Integrated circuits; Microelectrodes; Implants, Artificial; Biotelemetry; Metal oxide semiconductors |
Language |
eng |
Conference Title |
20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07); ; Bangalore, India |
Bibliographic Citation |
Harrison, R. R., Watkins, P. T., Kier, R. J., Black, D. J., Lovejoy, R. O., Normann, R. A., & Solzbacher, F. (2007). Design and testing of an integrated circuit for multi-electrode neural recording. Proceedings of the 20 th International Conference on VLSI Design (VLSID 2007), 907-12 |
Rights Management |
(c) 2007 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. |
Format Medium |
application/pdf |
Format Extent |
691,060 bytes |
Identifier |
ir-main,14015 |
ARK |
ark:/87278/s6v70338 |
Setname |
ir_uspace |
ID |
706107 |
Reference URL |
https://collections.lib.utah.edu/ark:/87278/s6v70338 |