| Publication Type |
Journal Article |
| School or College |
College of Engineering |
| Department |
Electrical & Computer Engineering |
| Creator |
Stevens, Kenneth |
| Other Author |
Suter, Bruce W.; Velazquez, Scott R.; Nguyen, Truong |
| Title |
Multirate as a hardware paradigm |
| Date |
1999 |
| Description |
Architecture and circuit design are the two most effective means of reducing power in CMOS VLSI. Mathematical manipulations, based on applying ideas from multirate signal processing have been applied to create high performance, low power architectures. To illustrate this approach, two case studies are presented - one concerns the design of a fast Fourier transforms(FFT) device, while the other one is concerned with the design of analog-to-digital converters. |
| Type |
Text |
| Publisher |
Institute of Electrical and Electronics Engineers (IEEE) |
| First Page |
1885 |
| Last Page |
1888 |
| Language |
eng |
| Bibliographic Citation |
Suter, B. W., Stevens, K. S., Velazquez, S. R., & Nguyen,T. (1999). Multirate as a hardware paradigm. Proceedings of the International Conference on Acoustics, Speech, and Signal Processing (ICASSP-99), IV, 1885-8. March. |
| Rights Management |
(c) 1999 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. |
| Format Medium |
application/pdf |
| Format Extent |
333,319 bytes |
| Identifier |
ir-main,15305 |
| ARK |
ark:/87278/s6nk3zkm |
| Setname |
ir_uspace |
| ID |
706300 |
| Reference URL |
https://collections.lib.utah.edu/ark:/87278/s6nk3zkm |
