Publication Type |
Journal Article |
School or College |
College of Engineering |
Department |
Electrical & Computer Engineering |
Creator |
Stevens, Kenneth |
Other Author |
Desai, Krishnaji |
Title |
Scalable asynchronous hardware protocol verification for compositions with relative timing |
Date |
2010 |
Description |
Correct interaction of asynchronous hardware protocols requires verification. Performance and power of asynchronous hardware circuits and protocols can be vastly improved by modifying them with judicious application of timing constraints. A methodology is presented for verifying larger asynchronous protocols through compositional model checking with symbolic methods. This approach uses Relative timing constraints for modeling timed asynchronous hardware protocols and hence is generic for timed and untimed protocols. This paper illustrates the modeling technique for interleaving and simultaneous models with relative timing, which helps in pruning state space. Properties which are verified for ensuring correctness of composed models are explained. Case studies of a linear pipeline controller and CElement are discussed by applying BDD and SAT methods. The simultaneous model yields better execution times when compared to interleaving for large number of compositions. In the simultaneous model, SAT methods tend to find a counter example in lesser time than BDD methods. Automatic model and property generation, leading to push button solution will enable verification of larger control planes. |
Type |
Text |
Publisher |
Institute of Electrical and Electronics Engineers (IEEE) |
Language |
eng |
Bibliographic Citation |
Desai, K., & Stevens, K. (2010). Scalable asynchronous hardware protocol verification for compositions with relative timing. In the TAU 2010 Workshop. March. |
Rights Management |
(c) 2010 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. |
Format Medium |
application/pdf |
Format Extent |
5,677,203 bytes |
Identifier |
ir-main,15267 |
ARK |
ark:/87278/s6571w3z |
Setname |
ir_uspace |
ID |
702337 |
Reference URL |
https://collections.lib.utah.edu/ark:/87278/s6571w3z |