Publication Type |
Journal Article |
School or College |
College of Engineering |
Department |
Computing, School of |
Creator |
Brunvand, Erik L. |
Other Author |
Richardson, William |
Title |
Fred: an architecture for a self-timed decoupled computer |
Date |
1996 |
Description |
Decoupled computer architectures provide an effective means of exploiting instruction level parallelism. Selftimed micropipeline systems are inherently decoupled due to the elastic nature of the basic FIFO structure, and may be ideally suited for constructing decoupled computer architectures. Fred is a self-timed decoupled, pipelined computer architecture based on micropipelines. We present the architecture of Fred, with specific details on a micropipelined implementation that includes support for multiple functional units and out-of-order instruction completion due to the self-timed decoupling. |
Type |
Text |
Publisher |
Institute of Electrical and Electronics Engineers (IEEE) |
Language |
eng |
Bibliographic Citation |
Richardson, W., & Brunvand, E. L. (1996). Fred: an architecture for a self-timed decoupled computer. International Conference on Advanced Research in Asynchronous Circuits and Systems (Async96). March. |
Relation is Part of |
ARPANET |
Rights Management |
(c) 1996 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. |
Format Medium |
application/pdf |
Format Extent |
87,911 bytes |
Identifier |
ir-main,15749 |
ARK |
ark:/87278/s68d0dwr |
Setname |
ir_uspace |
ID |
707069 |
Reference URL |
https://collections.lib.utah.edu/ark:/87278/s68d0dwr |