HDL modeling for analysis and optimization of asynchronous controllers

We propose a simulation-based technique for analysis and optimization of extended burst-mode (XBM) asynchronous controllers. In asynchronous controllers of this sort, timing information on control signals is significant both for performance enhancement and timing validation. Timing information, specifically information about relative signal arrival times, helps us improve the controller's response time and to detect delay faults within controllers in the early synthesis stage. If the timing information of the controller's environment is also known, we can use this information to identify fundamental mode violations. Our approach uses stochastic simulation of HDL programs derived from the original XBM specifications to gather information about signal timing and long-term transition probabilities.