TO
Filters: Subject: "Logic synthesis" Collection: "ir_etd" School Or College: "College of Engineering" Format: "application/pdf"
1 - 25 of 2
| Author | Title | Subject | Date | Publication Type | ||
|---|---|---|---|---|---|---|
| 1 |
 |
Gudla, Raghu Prasad | Design and implementation of clocked open core protocol interfaces for intellectual property cores and on-chip network fabric | Average power; Energy per transaction; Maximum bandwidth; Area and latency; Domain interface; Back-ends; Front-ends; IP cores; System-on-chip; Network-on-chip; Open core protocol; RTL development; Logic synthesis; APR and testing; Single-frequency clocked domain; Multifrequency clocked domain | 2011-05 | thesis |
| 2 |
 |
Condrat, Christopher | Design automation for integrated optics | Design automation; Integrated optics; Logic synthesis; Photonics; Routing; Thermal aware placement | 2014-08 | dissertation |
1 - 25 of 2