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Filters: Subject: "Formal verification" Department: "Electrical & Computer Engineering" Collection: "ir_etd" Type: "Text"
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| Author | Title | Subject | Date | Publication Type | ||
|---|---|---|---|---|---|---|
| 1 |
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Xu, Yang | Algorithms for automatic generation of relative timing constraints | Asynchronous circuits; Formal verification; Relative timing | 2011-05 | dissertation |
| 2 |
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Kulkarni, Dhanashree R. | Improved model generation and property specification for analog/mixed-signal circuits | AMS; Analog; Circuits; Formal verification; Mixed signal; Modeling | 2013-08 | thesis |
| 3 |
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Sun, Xiaojun | Word-level abstractions for sequential design verification using algebraic geometry | Algebraic geometry; Formal verification; Groebner basis; multiplier; normal basis; unsatisfiability | 2017 | dissertation |
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