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AuthorTitleSubjectDatePublication Type
1 Desai, KrishnajiSymbolic asynchronous hardware protocol verification for compositions with relative timingBDD; Relative timing; SAT; Symbolic model checking; Timed asynchronous protocol; Verification2010thesis
2 Thacker, Robert ANew verification method for embedded systemsEmbedded systems; Petri nets; Verification2010-12dissertation
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