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Year
2010
2011
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2010
2011
School Or College
College of Engineering
2
Department
Electrical & Computer Engineering
2
Publication Type
thesis
2
Subject
Verification
2
AMS
1
Analog/mixed-signal
1
BDD
1
Modeling
1
Petri-net
1
Relative timing
1
SAT
1
Simulation
1
Symbolic model checking
1
Timed asynchronous protocol
1
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Title
Setname
Type
1
Automatic extraction of behavioral models from simulations of analog/mixed-signal (AMS) circuits
ir_etd
Text
2
Symbolic asynchronous hardware protocol verification for compositions with relative timing
ir_etd
Text
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