TO
1 - 25 of 1
| Author | Title | Subject | Date | Publication Type | ||
|---|---|---|---|---|---|---|
| 1 |
 |
Desai, Krishnaji | Symbolic asynchronous hardware protocol verification for compositions with relative timing | BDD; Relative timing; SAT; Symbolic model checking; Timed asynchronous protocol; Verification | 2010 | thesis |
1 - 25 of 1