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| Author | Title | Subject | Date | Publication Type | ||
|---|---|---|---|---|---|---|
| 1 |
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Vij, Vikas S. | Algorithms and methodology to design asynchronous circuits using synchronous CAD tools and flows | Algorithms; asynchronous circuits; methodology; relative timing; synchronous CAD tools | 2013-12 | dissertation |
| 2 |
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Xu, Yang | Algorithms for automatic generation of relative timing constraints | Asynchronous circuits; formal verification; relative timing | 2011-05 | dissertation |
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