Fast structured design of VLSI circuits

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Publication Type technical report
School or College College of Engineering
Department Computing, School of
Creator Gu, Jun
Other Author Smith, K. F.
Title Fast structured design of VLSI circuits
Date 1988
Description We believe that a structured, user-friendly, cost-effective tool for rapid implementation of VLSI circuits which encourages students to participate directly in research projects are the key components in digital integrated circuit (IC) education. In this paper, we introduce our VLSI education activities, with t h e emphasis on t h e presentation of Path Programmable Logic (PPL) design methodology, in addition to a short description of a representative student project. Students using PPL are able to implement MOS or GaAs VLSI circuits with several thousands to over 100,000 transistors in a few weeks. They have designed and built numerous VLSI architectures and computer systems which play an influential role in various research areas. Our educational activities and the Utah Annual Student VLSI Design Contest supported by over a dozen leading American firms have attracted multiple university involvement in recent years.
Type Text
Publisher University of Utah
First Page 1
Last Page 31
Subject VLSI circuits; Rapid implementation
Subject LCSH Integrated circuits -- Very large scale integration
Language eng
Bibliographic Citation Gu, J., & Smith, K. F. (1988). Fast structured design of VLSI circuits. 1-31. UUCS-TR-88-024.
Series University of Utah Computer Science Technical Report
Rights Management ©University of Utah
Format Medium application/pdf
Format Extent 14,999,327 bytes
Identifier ir-main,16156
ARK ark:/87278/s6df78tf
Setname ir_uspace
Date Created 2012-06-13
Date Modified 2015-04-23
ID 707182
Reference URL
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