CMOS digital transmitters for emerging applications

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Publication Type dissertation
School or College College of Engineering
Department Electrical & Computer Engineering
Author Azam, Ali
Title CMOS digital transmitters for emerging applications
Date 2019
Description Mobile data traffic is growing at a staggering rate of 75% since 2014. The monthly data traffic ramped up from 2.1 million TB to 3.7 million TB from 2014 to 2015, and it is expected to continue growing at an even faster rate. Many emerging applications related to the internet-of-things (IoT) and 5G communications have posed new challenges for wireless circuits and sensor systems in terms of power consumption, performance metrics such as linearity, signal to noise ratio (SNR), error vector magnitude (EVM), out-of-band noise (OOB), adjacent channel leakage ratio (ACLR), etc., flexibility, and data throughput. For instance, the output power of a wireless transmitter may vary from a few mW to a few W, and the regulatory requirement for out-of-band (OOB) noise may be as stringent as -160 dBc/Hz while the operating frequency range may span from 0.5-100 GHz, depending on the applications. In addition, the sensors should be low power (< μW), and they may need to operate in remote places and be adaptable to different complementary metal-oxide semiconductor (CMOS) processes. Novel circuit architectures and techniques to support these emerging applications are presented in this work. First, a high power (~2W) fully digital transmitter architecture to support enhanced license augmented access (eLAA) is presented using state-of-the-art CMOS (16 nm). The transmitter meets stringent linearity and OOB requirements for WiFi and cellular coexistence. eLAA is a promising protocol recently released by the third-generation partnership project (3GPP) to augment cellular access by utilizing the existing iv WiFi infrastructure. In this dissertation, I propose for the first time a multisegmented, fully-unary SCPA architecture in conjunction with integrated high-order power-combiners and a linear switching scheme to meet OOB noise requirements with minimal impact on energy efficiency, die area, and cost. Second, an additional efficiency and linearity enhancement technique has been presented using delta-sigma modulated SCPA. Third, a frequency tunable multiband digital power amplifier (DPA) in 65 nm CMOS is proposed. It allows coverage of multiple fragmented frequency bands using a single narrowband DPA, ultimately reducing cost and area, and increasing data throughput. It is the first time, a DPA has been used to cover a wideband using a single narrowband power amplifier, and it leverages the switched-capacitor power amplifier (SCPA) architecture. Finally, an ultra-low power (47.2 nW) pulse-width-modulated (PWM) temperature sensor suitable for wireless communication using a digital friendly modulation and demodulation technique is presented. The architecture is capable of being powered by energy scavenging; hence, it is a suitable candidate for IoT and 5G. It consumes extremely low power (<50 nW), while operating with a supply voltage as low as 450 mV.
Type Text
Publisher University of Utah
Dissertation Name Doctor of Philosophy
Language eng
Rights Management (c) Ali Azam
Format Medium application/pdf
ARK ark:/87278/s6wb15dv
Setname ir_etd
ID 1671473
Reference URL https://collections.lib.utah.edu/ark:/87278/s6wb15dv
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