Description |
As Very Large Scale Integrated (VLSI) circuits continue to shrink in size and increase in complexity, device design is increasingly power constrained. Currently, engineers must design their chips and then perform lengthy simulations in order to generate accurate power estimates. Once power predictions are known, engineers decide if their designs are sufficiently energy efficient, and if not, make necessary changes. This presents a strong motivation to develop methods for early design power and energy estimates. Early energy predictions will need to be accurate enough, e.g., within 10% of simulation-based approaches, if they are to be useful. The general approach of this thesis to solving this problem was inspired by Metabolic Scaling Theory, which has been used for predicting behavioral characteristics in biological organisms, based on simple characteristics that are easily measured. This thesis is an initial step in the development of a similar predictive method for evaluating dynamic power in VLSI devices founded on a belief that wire properties can form the basis for accurate predictions. The analysis of several microprocessors or designs over two technology nodes validates this belief. |