Transmission lines on integrated circuits for high speed communication

As microelectronics continue to scale, the transistor delay decreases while the wire delay remains relatively constant or even increases. The wire or interconnect delay is quickly becoming the key performance limiting factor in integrated circuit design. This thesis is designed to determine the feasibility of replacing conventional diffusive wires with transmission lines and to compare the tradeoffs of the two systems. The transmission lines propagate signals at the speed of light in the medium and are much less dependent on repeaters than comparable diffusive wires. Therefore, the transmission line system has potentially large power and performance benefits. To compare the tradeoffs, five important design metrics are used: propagation delay, power consumption, maximum throughput, area requirements, and noise tolerance. The transmission lines prove to be an excellent replacement for diffusive wires especially as the length passes 500 /im. For a 1 cm interconnect, the transmission line shows more than a 90% improvement in delay and more than an 80% improvement in energy per bit transmitted. In practice, fabricating transmission lines on real integrated circuits is a difficult process because they require precise resistance, inductance, and capacitance parameter extraction. Using tools specially developed by Mentor Graphics for this thesis, the necessary wire dimensions to produce various transmission lines are calculated for in IBM's 65 nm process.