Mechanical fatigue performance of direct-attach, chip-size electronic packages

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Title Mechanical fatigue performance of direct-attach, chip-size electronic packages
Publication Type thesis
School or College College of Engineering
Department Mechanical Engineering
Author Larsen, Mark Raymond
Date 2008-01-04
Description Chip Scale Packages (CSPs) are rapidly becoming more widespread with the popularity of portable electronic products. The incentive for adoption of CSP technology is to facilitate low cost board and chip construction and eliminate the bulk associated with previous packaging techniques. These products are subject to mechanical stresses when dropped or the keypads are pressed. Such normal usage results in repetitive localized stresses at the chip-to-PCB (printed circuit board) interconnection, leading to interfacial delaminations, fatigue of solder joints, and, finally, to intermittent electrical failure. This project is aimed at emulating the multiaxial stresses induced in directattach, chip-size electronic packages during day-to-day use, for the purpose of predicting field wearout mechanisms and using better CSP architectures to improve overall reliability. Early on in the work, a primitive apparatus was designed to clamp a test board at one end and force the other end over a designed radius at one cycle per second. The learning curve of those initial tests provided a large amount of data in a relatively short period of time. The call for a tunable, reproducible stress state, however, indicated the need for a more customized test configuration. To meet the evolving needs, a test fixture was designed to apply a repeatable, high-frequency, low-level deflection to the test board using a four-point bend configuration. The new apparatus was designed as a closed-loop feedback system to input a known signal and continuously monitor the resulting force, displacement, strain, and resistance of mounted devices. Various architectures of the CSP devices were developed and manufactured onto custom PC test boards specifically for the purpose of determining relative mechanical robustness. The failure populations were grouped by architecture for using Weibull analysis techniques as part of the overall failure analysis approach. Upon completion of the experimental testing and failure analysis, the empirical results were compared to field results (failure mode observed on a consumer handheld device used in the "real world" for one year time). It was determined that mechanical bend testing closely emulates the wearout mechanisms incurred during field use of direct attach chip size electronic packages.
Type Text
Publisher University of Utah
Subject Chip scale packaging; CSP
Dissertation Institution University of Utah
Dissertation Name MS
Language eng
Relation is Version of Digital reproduction of "Mechanical fatigue performance of direct-attach, chip-size electronic packages" J. Willard Marriott Library Special Collections TK7.5 2008 .L37
Rights Management © Mark Raymond Larsen, To comply with copyright, the file for this work may be restricted to The University of Utah campus libraries pending author permission.
Format application/pdf
Format Medium application/pdf
Format Extent 58,563 bytes
Identifier us-etd2,149034
Source Original: University of Utah J. Willard Marriott Library Special Collections
Conversion Specifications Original scanned on Epson GT-30000 as 400 dpi to pdf using ABBYY FineReader 9.0 Professional Edition.
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Setname ir_etd
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Reference URL https://collections.lib.utah.edu/ark:/87278/s6hm5q2v
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