Filters: School Or College: "College of Engineering" Department: "Computing, School of" Collection: "ir_uspace"
| Creator | Title | Description | Subject | Date | ||
|---|---|---|---|---|---|---|
| 51 |
 |
Hoogenboom, Peter J. | System performance advisor user guide | The usage of the System Performance Advisor (SPA) expert system is described. Documentation of SPA system commands, system variables, diagnostic rules is given. Information on how to run the SPA system is discussed. In addition, an overview of how SPA searches for problems is supplied. The purpose o... | System Performance Advisor; SPA; User guide | 1991 |
| 52 |
 |
Gopalakrishnan, Ganesh | Case studies in symbolic model checking | The need to formally verify hardware and software systems before they are deployed the real world has been recognized for several decades now. This is especially true of concurrent systems that are even more difficult to debug than sequential systems. For example, many of the protocols that get emp... | Symbolic model checking; Hardware verification; Software verification | 1994 |
| 53 |
 |
Gopalakrishnan, Ganesh | Dynamic reordering of high latency transactions in time-warp simulation using a modified micropipeline | Time warp based simulation of discrete-event systems is an efficient way to overcome the synchronization overhead during distributed simulation. As computations may proceed beyond synchronization barriers in time warp, multiple checkpoints of state need to be maintained to be able to rollback inva... | Asynchronous design; Micropipelines; Dynamic instruction reordering; Time warp simulations | 1992 |
| 54 |
 |
Balasubramonian, Rajeev | Microarchitectural techniques to reduce interconnect power in clustered processors | The paper presents a preliminary evaluation of novel techniques that address a growing problem - power dissipation in on-chip interconnects. Recent studies have shown that around 50% of the dynamic power consumption in modern processors is within on-chip interconnects. The contribution of interc... | Microarchitectural techniques; Interconnect power; Clustered processors; On-chip | 2004 |
| 55 |
 |
Yang, Yue; Gopalakrishnan, Ganesh; Lindstrom, Gary E.; Slind, Konrad Lee | Nemos: a framework for axiomatic and executable specifications of memory consistency models | Conforming to the underlying memory consistency rules is a fundamental require- ment for implementing shared memory systems and writing multiprocessor programs. In order to promote understanding and enable automated verification, it is highly desir- able that a memory model specification be both ... | Nemos; Shared memory systems | 2003 |
| 56 |
 |
Fujimoto, Richard M. | Systolic array synthesis by static analysis of program dependencies | We present a technique for mapping recurrence equations to systolic arrays. While this problem has been studied in fairly great detail, the recurrence equations that are analysed here are a generalization of those studied previously. In a n earlier paper (14] we have showed how systolic arrays can b... | Systolic array synthesis; static analysis; program dependencies; recurrence equations | 1986 |
| 57 |
 |
Lindstrom, Gary E. | Type-safe composition of object modules | We describe a facility that enables routine type-checking during the linkage of external declarations and definitions of separately compiled programs in ANSI C. The primary advantage of our server-style type-checked linkage facility is the ability to program the combination of object modules via a s... | object modules; ANSI C; Type-safe; type-checking | 1994 |
| 58 |
 |
Hibler, Michael J. | Microkernels meet recursive virtual machines (draft. May 10, 1996)) | This paper describes a novel approach to providing modular and extensible operating system functionality, and encapsulated environments, based on a synthesis of micro-kernel and virtual machine concepts. We have developed a virtualizable architecture that allows recursive virtual machines (virtual m... | Microkernels; Virtual machines; Operating system functionality | 1996 |
| 59 |
 |
Carter, John B. | Using khazana to support distributed application development | One of the most important services required by most distributed applications is some form of shared data management, e.g., a directory service manages shared directory entries while groupware manages shared documents. Each such application currently must implement its own data management mechanisms,... | Khazana; Distributed applications; Development | 1999 |
| 60 |
 |
Lindstrom, Gary E. | Abstract semantics for functional constraint programming | A denotational semantics is given for a lazy functional language with monotonic side-effects arising from the unification of singly-bound logical variables. The semantics is based on a Scott-style information system, which elegantly captures the notion of "constraint additin" inherent in unificati... | Abstract semantics | 1989 |
| 61 |
 |
Regehr, John | Augmented CPU reservations: towards predictable execution on general-purpose operating systems | One problem with performing soft real-time computations on general-purpose operating systems is that these OSs may spend significant amounts of time in the kernel instead of performing work on behalf of the application that is nominally scheduled: the OS effectively steals time from the running appl... | 2001-01-01 | |
| 62 |
 |
Freire, Juliana | Combining scheduling strategies in tabled evaluations | Tabled evaluations ensure termination for Datalog programs by distinguishing calls to tabled subgoals. Given several variant subgoals in an evaluation, only the first (the generator) will use program clause resolution, the rest (consumers) must perform answer resolution using answers computed by th... | SLG; SLG-WAM; Tabling; Local scheduling; Batched scheduling | 1997 |
| 63 |
 |
Balasubramonian, Rajeev | Dynamically tuning processor resources with adaptive processing | Using adaptive processing to dynamically tune major microprocessor resources, developers can achieve greater energy efficiency with reasonable hardware and software overhead while avoiding undue performance loss. | Adaptive processing; Energy efficiency; DRI-cache | 2003-12 |
| 64 |
 |
Regehr, John | Two case studies in predictable application scheduling using Rialto/NT | This paper analyzes the results of two case studies in applying the Rialto/NT scheduler to real Windows 2000 applications. The first study is of a soft modem-a modem whose signal processing work is performed on the host CPU, rather than on a dedicated signal processing chip. The second is of an audi... | 2001-01-01 | |
| 65 |
 |
Gopalakrishnan, Ganesh | Explicit-enumeration based verification made memory-efficient | We investigate techniques for reducing the memory requirements of a model checking tool employing explicit enumeration. Two techniques are studied in depth: (1) exploiting symmetries in the model, and (2) exploiting sequential regions in the model. The first technique resulted in a significant reduc... | Verification; Model checking tool; Memory-efficient | 1995 |
| 66 |
 |
Lepreau, Jay | DRAFT: work in progress - - - comments solicited evolving Mach 3.0 to use migrating threads | Like most operating systems, Mach 3.0 views threads as statically associated with a single task. An alternative model is that of migrating threads, in which a single thread abstraction moves between tasks with the logical flow of control, and "server" code is passively executed. We have compatibly r... | DRAFT | 1993 |
| 67 |
 |
Mathew, Binu K.; Davis, Al; Fang, Zhen | A Gaussian probability accelerator for SPHINX 3 | Accurate real-time speech recognition is not currently possible in the mobile embedded space where the need for natural voice interfaces is clearly important. The continuous nature of speech recognition coupled with an inherently large working set creates significant cache interference with other... | Speech recognition; SPHINX 3; Speech recognizers | 2003-07-22 |
| 68 |
 |
Lindstrom, Gary E. | Layered, server-based support for Object-Oriented application development | This paper advocates the idea that the physical modularity (file structure) of application components supported by conventional OS environments can be elevated to the level of logical modularity, which in turn can directly support application development in an object-oriented manner. We demonstrate ... | Object-Oriented application development | 1995 |
| 69 |
 |
Balasubramonian, Rajeev | Dynamic memory hierarchy performance optimization | Although microprocessor performance continues to increase at a rapid pace, the growing processor-memory speed gap threatens to limit future performance gains. In this paper, we propose a novel configurable cache and TLB as an alternative to conventional two-level hierarchies. This organization le... | Microprocessor performance; Processor-memory speed gap | 2000 |
| 70 |
 |
Brunvand, Erik L.; Carter, John | Impulse: building a smarter memory controller | Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through configurable physical address remapping. By remapping physical addresses, applications control how their data is ac... | 1999 | |
| 71 |
 |
Carter, John; Susarla, Sai R. | Khazana An infrastructure for building distributed services | Essentially all distributed systems?? applications?? and services at some level boil down to the problem of man aging distributed shared state Unfortunately?? while the problem of managing distributed shared state is shared by many applications?? there is no common means of managing the data ... | Khazana; Distributed shared state | 1998 |
| 72 |
 |
Carter, John B. | Khazana an infrastructure for building distributed services | Essentially all distributed systems, applications and service at some level boil down to the problem of managing distributed shared state. Unfortunately, while the problem of managing distributed shared state is shared by man applications, there is no common means of managing the data - every applic... | Khazana; Distributed shared state | 1998 |
| 73 |
 |
Orr, Douglas B. | OMOS - An object server for program execution | The benefits of object-oriented programming are well known, but popular operating systems provide very few object-oriented features to users, and few are implemented using object-oriented techniques themselves. In this paper we discuss a mechanism for applying object-oriented programming concepts to... | OMOS; Object server | 1992 |
| 74 |
 |
Gopalakrishnan, Ganesh | Performance analysis and optimization of asynchronous circuits | Asynchronous/Self-timed circuits are beginning to attract renewed attention as promising means of dealing with the complexity of modern VLSI designs. However, there are very few analysis techniques or tools available for estimating the performance of asynchronous circuits. In this paper we adapt th... | Asynchronous circuits; Performance analysis; Optimization; VLSI circuits | 1994 |
| 75 |
 |
Gu, Jun | An optimal, parallel discrete relaxation algorithm and architecture (Revised January 1988 and August 1989) | A variety of problems in artificial intelligence, operations research, symbolic logic, pattern recognition and computer vision, and robot manipulation are special cases of the Consistent Labeling Problem (CLP). The Discrete Relaxation Algorithm (DRA) is an efficient computational technique to enfor... | Consistent Labeling Problem; CLP; Discrete Relaxation Algorithm; DRA | 1988 |