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CreatorTitleDescriptionSubjectDate
226 Regehr, JohnPrecise garbage collection for CMagpie is a source-to-source transformation for C programs that enables precise garbage collection, where precise means that integers are not confused with pointers, and the liveness of a pointer is apparent at the source level. Precise GC is primarily useful for long-running programs and programs t...2009-01-01
227 Hansen, Charles D.Penumbra maps: approximate soft shadows in real-timeGenerating soft shadows quickly is difficult. Few techniques have enough flexibility to interactively render soft shadows in scenes with arbitrarily complex occluders and receivers. This paper introduces the penumbra map, which extends current shadow map techniques to interactively approximate soft ...2003-01-01
228 Hansen, Charles D.Interactive rendering and efficient querying for large multivariate seismic volumes on consumer level PCsWe present a volume visualization method that allows interactive rendering and efficient querying of large multivariate seismic volume data on consumer level PCs. The volume rendering pipeline utilizes a virtual memory structure that supports out-of-core mul- tivariate multi-resolution data and a GP...2013-01-01
229 Kirby, Robert MichaelA scalable, efficient scheme for evaluation of stencil computations over unstructured meshesStencil computations are a common class of operations that appear in many computational scientific and engineering applications. Stencil computations often benefit from compile-time analysis, exploiting data-locality, and parallelism. Post-processing of discontinuous Galerkin (dG) simulation solutio...2013-01-01
230 Pascucci, ValerioExploring power behaviors and trade-offs of in-situ data analyticsAs scientific applications target exascale, challenges related to data and energy are becoming dominating concerns. For example, coupled simulation workflows are increasingly adopting in-situ data processing and analysis techniques to address costs and overheads due to data movement and I/O. However...2013-01-01
231 Pascucci, ValerioCharacterization and modeling of PIDX parallel I/O for performance optimizationParallel I/O library performance can vary greatly in re- sponse to user-tunable parameter values such as aggregator count, file count, and aggregation strategy. Unfortunately, manual selection of these values is time consuming and dependent on characteristics of the target machine, the underlying fi...2013-01-01
232 Zhang, LixinISIM: The simulator for the impulse adaptable memory systemThis document describes ISIM, the simulator for the Impulse Adaptable Memory System. Impulse adds two new features to a conventional memory system. First, it supports a configurable, extra level of address remapping at the memory controller. Second, it supports prefetching at the memory controller. ...ISIM; Impulse Adaptable Memory System; Memory systems1999
233 Stoller, Leigh B.Message passing support in the Avalanche widgetMinimizing communication latency in message passing multiprocessing systems is critical. An emerging problem in these systems is the latency contribution costs caused by the need to percolate the message through the memory hierarchy (at both sending and receiving nodes) and the additional cost of ma...Avalanche widget; Message passing; Cache coherence; Message copying; Cache miss rates; Computer memory1996
234 Brunvand, Erik L.A correctness criterion for asynchronous circuit validation and optimizationIn order to reason about the correctness of asynchronous circuit implementations and specifications, Dill has developed a variant of trace theory [1]. Trace theory describes the behavior of an asynchronous circuit by representing its possible executions as strings called "traces" A useful relatio...Asynchronous circuits; Circuit optimizations; Formal verification of hardware; Trace theory; Asynchronous circuit validation1992
235 Gopalakrishnan, GaneshBounded transaction model checkingIndustrial cache coherence protocol models often have too many reachable states, preventing full reachability analysis even for small model instances (number of processors, addresses, etc.). Several partial search debugging methods are, therefore, employed, including lossy state compression using...Model checking; Reachability analysis2006-02-27
236 Riesenfeld, Richard F.; Smith, Kent F.An experimental system for computer aided geometric designThe main goal of this proposed level-of-effort project is to extend present capabilities in the area of Computer Aided Geometric Design (CAGD) and to develop custom VLSI support for some special geometric functions.Computer aided geometric design; CAGD; VLSI; Very large scale integration1984
237 Gopalakrishnan, GaneshA partial order reduction algorithm without the ProvisoThis paper presents a partial order reduction algorithm, called Two phase, that preserves stutter free LTL properties. Two phase dramatically reduces the number of states visited compared to previous partial order reduction algorithms on most practical protocols. The reason can be traced to a step o...Order reduction algorithm; Proviso step1998
238 Freire, Juliana; Silva, Claudio T.Simplifying the design of workflows for large-scale data exploration and visualizationWorkflows and Computational Processes. Workflows are emerging as a paradigm for representing and managing complex computations - Simulations, data analysis, visualization, data integration.2008
239 Kessler, Robert R.Visual threads: the benefits of multithreading in visual programming languagesAfter working with the CWave visual programming language, we discovered that many of our target domains required the ability to define parallel computations within a program. CWave has a strongly hierarchical model of computation, so it seemed like adding the ability to take a part of the hierarchy ...Visual threads; multithreading; CWave1997
240 Gopalakrishnan, GaneshPerformance studies of PV: an On-the-fly model-checker for LTL-X featuring selective caching and partial order reductionWe present an enumerative model-checker PV that uses a new partial order reduction algorithm called Twophase. This algorithm does not use the in-stack check to implement the proviso, making the combination of Twophase with on-the-fly LTL-X model-checking based on nested depth-first search, as well a...Model-checker; PV; Performance; On-the-fly; Partial order reduction algorithm;' Twophase2001
241 Bhanu, BirCAOS an approach to robot controlControl systems which enable robots to behave intelligently is a major issue in todays process of automating factories. This thesis presents a hierarchical robot control system, a programming language for goal achievement, termed CAOS for Control using Action Oriented Schemata, with ideas taken fro...Robot control system; CAOS; Control using Action Oriented Schemata1987
242 Berzins, MartinInvestigating applications portability with the Uintah DAG-based runtime system on PetaScale supercomputersPresent trends in high performance computing present formidable challenges for applications code using multicore nodes possibly with accelerators and/or co-processors and reduced memory while still attaining scalability. Software frameworks that execute machine-independent applications code using a ...2013-01-01
243 Berzins, MartinSystematic debugging methods for large-scale HPC computational frameworksParallel computational frameworks for high-performance computing are central to the advancement of simulation-based studies in science and engineering. Finding and fixing bugs in these frameworks can be time consuming. If left unchecked, these bugs diminish the amount of new science performed. A sys...2014-01-01
244 Regehr, JohnCause reduction for quick testingAbstract-In random testing, it is often desirable to produce a "quick test" - an extremely inexpensive test suite that can serve as a frequently applied regression and allow the benefits of random testing to be obtained even in very slow or oversubscribed test environments. Delta debugging is an alg...2014-01-01
245 Boll, Steven F.Noise suppression methods for robust speech processing (1 April 1979- 30 Sept. 1979)Robust speech processing in practical operating environments requires effective environmental and processor noise suppression. This report describes the technical findings and accomplishments during this reporting period for the research program funded to develop real-time, compressed speech analysi...Noise suppression; Signal contamination; Compressed speech analysis-synthesis algorithms1979
246 Michell, NickOn the potential of asynchronous pipelined processorsAn asynchronous version of the pipelined R3000 and DLX processors, the A3000, is being designed. Simulation was employed t o investigate the potential speed-up obtainable due t o the asynchronous operation. Preliminary results show up to a 64% improvement in performance.Pipelined processors; Pipelined R3000; DLX processors; A30001990
247 Starkey, MikeA lisp-based occam interpreterThe OCCAM programming language is an implementation of Communicating Sequential Processes and is used in a number of different areas. These areas usually require explicitly describing small-grain paralleslism. OCCAM programs formed by such descriptions can be tested for correctness by executing the...Lisp-based; Occam interpreter1991
248 Brunvand, Erik L.The NSR processorThe NSR (Non-Synchronous RISC) processor is a general-purpose computer structured (IS U collection of self-timed blocks that operate concurrently and communicate over bundled data channels in the style of micropipelines [3, 16]. These blocks correspond to standard synchronous pipeline stages such ...1993
249 Parker, Steven G.Memory-savvy distributed interactive ray tracingInteractive ray tracing in a cluster environment requires paying close attention to the constraints of a loosely coupled distributed system. To render large scenes interactively, memory limits and network latency must be addressed efficiently. In this paper, we improve previous systems by moving to ...2004
250 Brunvand, Erik L.; Smith, Kent F.A comparison of self-timed design using FPGA, CMOS, and GaAs technologiesAsynchronous or self-timed systems that do not rely on U global clock to keep system components synchronized can offer significant advantages over traditional clocked circuits in a variety of applications. One advantage is that because of the separation of timing, from, functionality in these sys...1992
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