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Title | Description | Subject | Date |
1 |
 | A pipelined architecture for ray tracing | Ray tracing is a computer graphics rendering algorithm well known for the realistic images that it generates. Its primary drawback is the huge amount of computation required for even moderately complex scenes. Pipelined architectures have been used for many years to accelerate conventional scan conv... | computer architecture; computers; pipeline; computer graphics; RayPipe | 1994-06 |
2 |
 | Design of a Self-Timed, Pipelined, Floating Point Multiplier in Gallium Arsenide | This thesis presents the design of a self-timed, floating point multiplier in Gallium Arsenide (GaAs) technology. It implements the Institute of Electrical and Electronic Engineers (IEEE) single precision standard. Self-timed design methodology offers some advantages over a synchronous approach, esp... | gallium arsenide; floating point multiplier; GaAs; GaAs technology | 1994-06 |
3 |
 | Synthesis, Verification and Optimization of Systolic Arrays | Systolic arrays are a class of parallel architectures consisting of regular interconnections of a very large number of simple processors, each one operating on a small part of the problem. They are typically designed to be used as back-end. special-purpose devices for computation-intensive processin... | computer architecture; systolic array; VLSI | 1986-12 |
4 |
 | A User Interface Model and Tools for Geometric Design | Poor user interfaces discourage potential users from effectively utilizing the design capabilities of geometric modeling systems. Because of the complex nature of the underlying representations in such systems, a well structured user interface model, as well as useful and intuitive design tools, are... | user interface; computer systems; computer-aided design | |
5 |
 | Space-Form. Computer-Aided Design for Architecture | The design approach proposed in the report is generated from basic space-forms. These three-dimensional forms are used by the designer as building blocks to design at every scale--from the most minute details of a given building to the eventual placement of the building in the context of its surroun... | | 1968-09-01 |
6 |
 | A Multiprocessor Implementation of CSP (Communicating Sequential Processes) | Communicating Sequential Processes (CSP) is a well known paradigm for communication and synchronization of a parallel computation. A CSP program consists of a collection of processes P(1), P(2),....., P(N) that interact by exchanging message. These message passing primitives, called input and output... | | 1988-03 |
7 |
 | The A3000: An asynchronous version of the R3000 | This thesis presents the architectural design and implementation of an N-stage Self-Timed RISC processor based on a subset of the MIPS R3000. The goal is to lay the ground work to show it will be possible in the future to build an asynchoronous pipelined RISC processor that has the chance to to comm... | A3000; asynchronous; computers | 1995-03 |
8 |
 | Sequencing computational events in heterogeneous distributed systems | Distributed systems are growing in number, size, and complexity. Some technological advances have been made to program these systems, most notably the remote procedure call. However, the nature of heterogeneous distributed systems allows for much more complex interactions and new programming technol... | electronic data processing; distributed processing; high-level algorithms | 1990-06 |
9 |
 | Load balancing and fault tolerance in applicative systems | Applicative systems are promising candidates to achieve high performance computing through aggregation of processors. This dissertation studies two important issues in building scalable applicative systems: load balancing problem and fault tolerance.; A dynamic load balancing scheme is proposed for ... | computer architecture; load balancing; fault tolerance; computer science; applicative systems | 1985-08 |