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Creator | Title | Description | Subject | Date |
601 |
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Hibler, Michael J. | Notes on thread models in Mach 3.0 | During the Mach In-Kernel Servers work, we explored two alternate thread models that could be used to support traps to in-kernel servers. In the "migrating threads" model we used, the client's thread temporarily moves into the server's task for the duration of the call. In t h e "thread switching" ... | Thread models; In-kernel servers; Thread switching; Mach 3.0 | 1993 |
602 |
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Brunvand, Erik L. | The NSR processor | The NSR (Non-Synchronous RISC) processor is a general-purpose computer structured (IS U collection of self-timed blocks that operate concurrently and communicate over bundled data channels in the style of micropipelines [3, 16]. These blocks correspond to standard synchronous pipeline stages such ... | | 1993 |
603 |
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Richardson, William F.; Brunvand, Erik L. | The NSR processor prototype | The NSR (Non-Synchronous RISC) processor is a general purpose processor structured as a collection of self-timed units that operate concurrently and communicate over bundled data channels in the style of micropipelines. These units correspond to standard synchronous pipeline stages such as Instructi... | Self-timed Systems; Asynchronous systems; Micropipelines; FPGAs; RISC processor; NSR | 1992 |
604 |
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Richardson, William F.; Brunvand, Erik L. | The NSR processor prototype | The NSR Non Synchronous RISC processor is a general purpose processor structured as a collection of self timed units that operate concurrently and communicate over bundled data channels in the style of micropipelines?? These units correspond to standard synchronous pipeline stages such as Instr... | Self-timed Systems; Asynchronous systems; Micropipelines; FPGAs; RISC processor | 1992 |
605 |
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Lindstrom, Gary E. | Object-oriented programming in scheme with first-class modules and operator-based inheritance | We characterize object-oriented programming as structuring and manipulating a uniform space of first-class values representing modules, a distillation of the notion of classes. Operators over modules individually achieve effects such as encapsulation, sharing, and static binding. A variety of idioms... | First-class modules; Operator-based inheritance | 1995 |
606 |
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Regehr, John | Offline compression for on-chip RAM | We present offline RAM compression, an automated source-to-source transformation that reduces a program's data size. Statically allocated scalars, pointers, structures, and arrays are encoded and packed based on the results of a whole-program analysis in the value set and pointer set domains. We tar... | | 2007-01-01 |
607 |
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Orr, Douglas B. | OMOS - An object server for program execution | The benefits of object-oriented programming are well known, but popular operating systems provide very few object-oriented features to users, and few are implemented using object-oriented techniques themselves. In this paper we discuss a mechanism for applying object-oriented programming concepts to... | OMOS; Object server | 1992 |
608 |
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Orr, Douglas B.; Mecklenburg, Robert | OMOS ? An object server for program execution | The benefits of object-oriented programming are well known but popular operating systems provide very few object oriented features to users and few are im plemented using object oriented techniques themselves In this paper we discuss a mechanism for apply ing object oriented programming co... | OMOS; Object server | 1992 |
609 |
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Kasera, Sneha K. | On fast and accurate detection of unauthorized wireless access points using clock skews | We explore the use of clock skew of a wireless local area network access point (AP) as its fingerprint to detect unauthorized APs quickly and accurately. The main goal behind using clock skews is to overcome one of the major limitations of existing solutions-the inability to effectively detect Mediu... | Clock skews; Unauthorized access; Medium access control; MAC; Address spoofing; Wireless networks; Time Synchronization Function; TSF | 2010-03 |
610 |
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Subrahmanyam, P.A. | On proving the correctness of data type implementations | In order to prove the correctness (or consistency) of an implementation of a data type with respect to the data type's specifications, the minimal amount of information that needs to be provided consists of: (i) a specification of the type being implemented; (ii) a specification of the representati... | Data type; Consistency | 1980 |
611 |
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Fujimoto, Richard M. | On synthesizing systolic arrays from recurrence equations with linear dependencies | We present a technique for synthesizing systolic architectures from Recurrence Equations. A class of such equations (Recurrence Equations with Linear Dependencies) is defined and and the problem of mapping such equations onto a two dimensional architecture is studied. We show that such a mapping is ... | Recurrence equations | 1986 |
612 |
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Gopalakrishnan, Ganesh | On the decidability of shared memory consistency verification | We view shared memories as structures which define relations over the set of programs and their executions. An implementation is modeled by a transducer, where the relation it realizes is its language. This approach allows us to cast shared memory verification as language inclusion. We show tha... | Shared memory; Consistency; Verification | 2005-03-15 |
613 |
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Michell, Nick | On the potential of asynchronous pipelined processors | An asynchronous version of the pipelined R3000 and DLX processors, the A3000, is being designed. Simulation was employed t o investigate the potential speed-up obtainable due t o the asynchronous operation. Preliminary results show up to a 64% improvement in performance. | Pipelined processors; Pipelined R3000; DLX processors; A3000 | 1990 |
614 |
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Kirby, Robert Michael II | On the use of adjoint-based sensitivity estimates to control local mesh refinement | The goal of efficient and robust error control, through local mesh adaptation in the computational solution of partial differential equations, is predicated on the ability to identify in an a posteriori way those localized regions whose refinement will lead to the most significant reductions in the ... | Sensitivity; Adaptivity; Error estimation; hp-finite elements; Discrete adjoint; Mesh refinement | 2009 |
615 |
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Regehr, John | Operating system support for multimedia: the programming model matters | Multimedia is an increasingly important part of the mix of applications that users run on personal computers and workstations. The requirements placed on a multimedia operating system are demanding and often conflicting: untrusted, independently written soft real-time applications must be able to co... | | 2000-01-01 |
616 |
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Riloff, Ellen M. | OpinionFinder: a system for subjectivity analysis | OpinionFinder is a system that performs subjectivity analysis, automatically identifying when opinions, sentiments, speculations and other private states are present in text. Specifically, OpinionFinder aims to identify subjective sentences and to mark various aspects of the subjectivity in the... | OpinionFinder; Subjectivity analysis | 2005 |
617 |
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Templeton, Frederick E. | Optimal control of a process with discrete and continuous decision variables | The task of dynamic optimization consists of manipulating the inputs to a dynamic system (i.e., one in which the state varies with time) so that the system performs in an advantageous manner. This paper presents a systematic technique for solving the problem of optimally controlling a converter ais... | Dynamic optimization; Decision variables; Converter aisle; Copper smelter | 1970 |
618 |
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Fujimoto, Richard M. | Optimal performance of distributed simulation programs | This paper describes a technique to analyze the potential speedup of distributed simulation programs. A distributed simulation strategy is proposed which minimizes execution time through the use of an oracle to control the simulation. Because the strategy relies on an oracle, it cannot be used for ... | Distributed simulation programs | 1987 |
619 |
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Sikorski, Kris | Optimal solution of nonlinear equations | We survey recent worst case complexity results for the solution of nonlinear equations. Notes on worst and average case analysis of iterative algorithms and a bibliography of the subject are also included. | | 1985 |
620 |
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Balasubramonian, Rajeev | Optimizing communication and capacity in a 3D stacked reconfigurable cache hierarchy | Cache hierarchies in future many-core processors are expected to grow in size and contribute a large fraction of overall processor power and performance. In this paper, we postulate a 3D chip design that stacks SRAM and DRAM upon processing cores and employs OS-based page coloring to minimize hori... | Multi-core processors; Cache and memory hierarchy; Non-uniform cache architecture (NUCA); Page coloring; On-chip networks; SRAM/DRAM cache reconfiguration | 2009-02 |
621 |
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Sudan, Kshitij | Optimizing datacenter power with memory system levers for guaranteed quality-of-service | Co-location of applications is a proven technique to improve hardware utilization. Recent advances in virtualization have made co-location of independent applications on shared hardware a common scenario in datacenters. Colocation, while maintaining Quality-of-Service (QoS) for each application is a... | | 2012-01-01 |
622 |
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Johnson, Christopher R. | Optimizing Inverse Electrocardiographic Problem: Hybrid and High-Order Finite Element Method | One type of inverse problems in electrocardiography (ECG) is to non-invasively reconstruct epicardial electric potentials from body-surface measurements. We study how to design the finite element discretization of such problem, so as to optimize the conditioning and stability of the resulting num... | | |
623 |
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Balasubramonian, Rajeev | Optimizing NUCA organizations and wiring alternatives for large caches with CACTI 6.0 | A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, and thermal management strategies. There are a number of interconnect design considerations that influence power/performanc... | CACTI 6.0; Non-uniform cache architectures (NUCA); Cache models; Memory hierarchies; On-chip interconnects | 2007-12 |
624 |
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Freire, Juliana | Organizing hidden-web databases by clustering visible web documents | In this paper we address the problem of organizing hidden-Web databases. Given a heterogeneous set of Web forms that serve as entry points to hidden-Web databases, our goal is to cluster the forms according to the database domains to which they belong. We propose a new clustering approach that mode... | Hidden-web databases; Web documents | 2007-04 |
625 |
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Lindstrom, Gary E. | Our LIPS are sealed: interfacing logic and functional programming systems | We report on a technique for interfacing an untyped logic language to a statically poly morphically typed functional language Our key insight is that polymorphic types can be interpreted as "need to know" specifications on function arguments. This leads to a criterion for liberally yet safely invoki... | LIPS; Logic language; Functional language | 1992 |