Sisyphus, an environment for simulation

Sisyphus is an environment for the simulation of integrated circuits (ICs). It supports hierarchical simulation from the functional block level down to circuit analysis. Sisyphus develops a new hierarchical wire model (based on that of Sable) which facilitates the accurate simulation of incomplete designs. Sisyphus provides a testbed for the coding of new algorithms; the coding of existing algorithms has been accomplished, using Sisyphus resources, in a fraction of the effort needed elsewhere. It also supports a wide range of simulation algorithms including Iterated Timing Analysis and Mossim; different simulation algorithms are integrated via partitioning a circuit into subnetworks, and simulating each with the most appropriate algorithms. The possibility of combining multiple simulation algorithms, each where it is most effective, is shown to result in significantly faster or more accurate simulation The design perspective of Sisyphus, its implementation, and the results of using Sisyphus are examined here.