LEMA: A tool for the formal verification of digitally-intensive analog/mixed-signal circuits

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Publication Type pre-print
School or College College of Engineering
Department Electrical & Computer Engineering
Creator Myers, Chris J.
Other Author Fisher, Andrew N.; Batchu, Satish; Jones, Kevin; Kulkarni, Dhanashree; Little, Scott; Walter, David
Title LEMA: A tool for the formal verification of digitally-intensive analog/mixed-signal circuits
Date 2014-01-01
Description The increasing integration of analog/mixed-signal (AMS) circuits into system designs has further complicated an already difficult verification problem. Recently, formal verification, which has been successful in the purely digital domain, has made some in-roads in the AMS domain. This paper describes one such formal verification tool for AMS circuits, LEMA. In particular, LEMA is capable of generating a formal model from simulation traces that, when coupled with a formal property provided in our new property language, can be model checked with one of three model checkers within LEMA. This paper briefly describes the capabilities of the LEMA AMS verification tool flow.
Type Text
Publisher Institute of Electrical and Electronics Engineers (IEEE)
First Page 1017
Last Page 1020
Language eng
Bibliographic Citation Fisher, A. N., Batchu, S., Jones, K., Kulkarni, D., Little, S., Walter, D., & Myers, C. J. (2014). LEMA: A tool for the formal verification of digitally-intensive analog/mixed-signal circuits. Midwest Symposium on Circuits and Systems, 1017-20.
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Format Medium application/pdf
Format Extent 419,962 bytes
Identifier uspace,19053
ARK ark:/87278/s6283hp6
Setname ir_uspace
ID 712734
Reference URL https://collections.lib.utah.edu/ark:/87278/s6283hp6
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