Understanding the behavior of Pthread applications on non-uniform cache architectures

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Links to Media http://posterexperience.com/uspace/html/poster.php?id=1133
Publication Type Poster
School or College College of Engineering
Department Computing, School of
Creator Sudan, Kshitij
Other Author Sachdev, Gagandeep S.; Hall, Mary W.; Balasubramonian, Rajeev
Title Understanding the behavior of Pthread applications on non-uniform cache architectures
Date 2011-10-08
Description Why is it important? As number of cores in a processor scale up, caches would become banked Keeps individual look-up time small. Allows parallel accesses by different cores. Present shared programming model assumes a flat memory. Unaware application can have sub-optimal performance Conclusion Programming model needs to change For any heterogeneous memory hierarchy. Architecture, OS, compiler and application developer should work together Significant performance gains can be achieved. ? Without increasing system complexity. As complexity of memory hierarchy grows, optimizations like these will be critical.
Type Text; Image
Publisher University of Utah
Subject Computer architecture, compiler analysis, NUCA caches
Language eng
Bibliographic Citation Gagandeep S. Sachdev, Kshitij Sudan, Mary W. Hall & Rajeev Balasubramonian (2011). Understanding the Behavior of Pthread Applications on Non-Uniform Cache Architectures. University of Utah
Rights Management ©Gagandeep S. Sachdev, Kshitij Sudan, Mary W. Hall, Rajeev Balasubramonian
Format Medium application/pdf
Format Extent 1,059,076 bytes
Identifier ir-main/17196
ARK ark:/87278/s6p565xw
Setname ir_uspace
ID 705411
Reference URL https://collections.lib.utah.edu/ark:/87278/s6p565xw
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