Avalanche: A communication and memory architecture for scalable parallel computing

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Publication Type technical report
School or College College of Engineering
Department Computing, School of
Program Advanced Research Projects Agency
Creator Carter, John B.; Davis, Al; Kuramkote, Ravindra; Stoller, Leigh B.
Other Author Kuo, Chen-Chi; Swanson, Mark
Title Avalanche: A communication and memory architecture for scalable parallel computing
Date 1995
Description As the gap between processor and memory speeds widens?? system designers will inevitably incorpo rate increasingly deep memory hierarchies to maintain the balance between processor and memory system performance At the same time?? most communication subsystems are permitted access only to main memory and not a processor s top level cache As memory latencies increase?? this lack of integration between the memory and communication systems will seriously impede interprocessor communication performance and limit e ective scalability In the Avalanche project we are re designing the memory architecture of a commercial RISC multiprocessor?? the HP PA RISC ?? to include a new multi level context sensitive cache that is tightly coupled to the communication fabric The primary goal of Avalanche s integrated cache and communication controller is attack ing end to end communication latency in all of its forms This includes cache misses induced by excessive invalidations and reloading of shared data by write invalidate coherence protocols and cache misses induced by depositing incoming message data in main memory and faulting it into the cache An execution driven simulation study of Avalanche s architecture indicates that it can reduce cache stalls by and overall execution times by
Type Text
Publisher University of Utah
Subject Avalanche; Communication architecture; Memory architecture
Language eng
Bibliographic Citation Carter, J. B., Davis, A., Kuramkote, R., Kuo, C.-C., Stoller, L. B., Swanson, M. (1995). A valanche: A communication and memory architecture for scalable parallel computing. UUCS-95-022.
Series University of Utah Computer Science Technical Report
Relation is Part of ARPANET
Rights Management ©University of Utah
Format Medium application/pdf
Format Extent 231,821 bytes
Source University of Utah School of Computing
ARK ark:/87278/s6fx7tqv
Setname ir_uspace
Date Created 2012-06-13
Date Modified 2015-04-22
ID 703616
Reference URL https://collections.lib.utah.edu/ark:/87278/s6fx7tqv
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