Automatic rapid prototyping of semi-custom VLSI circuits using actel FPGAs

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Publication Type Journal Article
School or College College of Engineering
Department Computing, School of
Creator Brunvand, Erik L.
Other Author Smith, Kent F.; Yoo, Jae-Tack
Title Automatic rapid prototyping of semi-custom VLSI circuits using actel FPGAs
Date 1995
Description Abstract : We describe a technique for translating semi-custom VLSI circuits automatically into field programmable gate arrays (FPGAs) for rapid prototyping to develop a system. Using an array multiplier as an example of this translation, the VLSI circuits are designed using a cell-matrix based environment. The multiplier is implemented in CMOS in both synchronous and asynchronous pipelined versions, and translated into Actel FPGAs. All test chips were found to be fully functional, and the translation efficiency in terms of chip speed and area is shown.
Type Text
Publisher Institute of Electrical and Electronics Engineers (IEEE)
First Page 148
Last Page 151
Language eng
Bibliographic Citation Yoo, J.-T., Brunvand, E. L., & Smith, K. F. (1995). Automatic rapid prototyping of semi-custom VLSI circuits using actel FPGAs. Fifth Great Lakes Symposium on VLSI, 148-51. 1995.
Rights Management (c) 1995 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Format Medium application/pdf
Format Extent 410,711 bytes
Identifier ir-main,15756
ARK ark:/87278/s6s47963
Setname ir_uspace
ID 703454
Reference URL https://collections.lib.utah.edu/ark:/87278/s6s47963
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